Remove Dromajo + documentation
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Debugging BOOM
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======================
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In addition to the default debugging techniques specified in :ref:`Advanced-Concepts/Debugging-RTL:Debugging RTL`,
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single-core BOOM designs can utilize the Dromajo co-simulator (see :ref:`Tools/Dromajo:Dromajo`)
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to verify functionality.
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.. warning:: Dromajo currently only works in single-core BOOM systems without accelerators.
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.. warning:: Dromajo currently only works in VCS simulation and FireSim.
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Setting up Dromajo Co-simulation
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--------------------------------------
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Dromajo co-simulation is setup to work when three config fragments are added to a BOOM config.
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* A ``chipyard.config.WithTraceIO`` config fragment must be added so that BOOM's traceport is enabled.
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* A ``chipyard.iobinders.WithTraceIOPunchthrough`` config fragment must be added to add the ``TraceIO`` to the ``ChipTop``
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* A ``chipyard.harness.WithSimDromajoBridge`` config fragment must be added to instantiate a Dromajo cosimulator in the ``TestHarness`` and connect it to the ``ChipTop``'s ``TraceIO``
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Once all config fragments are added Dromajo should be enabled.
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To build/run Dromajo with a BOOM design, run your configuration the following make commands:
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.. code-block:: shell
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# build the default Dromajo BOOM config without waveform dumps
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# replace "DromajoBoomConfig" with your particular config
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make CONFIG=DromajoBoomConfig ENABLE_DROMAJO=1
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# run a simulation with Dromajo
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make CONFIG=DromajoBoomConfig ENABLE_DROMAJO=1 BINARY=<YOUR-BIN> run-binary
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@@ -100,6 +100,6 @@ You can find the overnight options in `overnight/src/main/scala/main.scala` in t
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Firesim Debugging
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---------------------------
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Chisel printfs, asserts, Dromajo co-simulation, and waveform generation are also available in FireSim
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Chisel printfs, asserts, Cospike co-simulation, and waveform generation are also available in FireSim
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FPGA-accelerated simulation. See the FireSim
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`documentation <https://docs.fires.im/en/latest/>`__ for more detail.
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@@ -86,10 +86,6 @@ Tools
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**Dsptools**
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A Chisel library for writing custom signal processing hardware, as well as integrating custom signal processing hardware into an SoC (especially a Rocket-based SoC).
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**Dromajo**
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A RV64GC emulator primarily used for co-simulation and was originally developed by Esperanto Technologies.
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See :ref:`Tools/Dromajo:Dromajo` for more information.
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Toolchains
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-------------------------------------------
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@@ -1,22 +0,0 @@
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Dromajo
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===============================
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`Dromajo <https://github.com/chipsalliance/dromajo/>`__ is a RV64GC functional simulator designed for co-simulation.
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To use it as a co-simulator, it requires you to pass the committed trace of instructions coming from the core into the tool.
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Within Chipyard, this is done by connecting to the `TracePort`` signals that are piped to the top level of the DUT.
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While the Rocket core does have a `TracePort`, it does not provide the committed write data that Dromajo requires.
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Thus, Dromajo uses the `ExtendedTracePort` only probided by BOOM (BOOM is the only core that supports Dromajo co-simulation).
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An example of a divergence and Dromajo's printout is shown below.
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.. code-block:: shell
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[error] EMU PC ffffffe001055d84, DUT PC ffffffe001055d84
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[error] EMU INSN 14102973, DUT INSN 14102973
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[error] EMU WDATA 00000000000220d6, DUT WDATA 00000000000220d4
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[error] EMU MSTATUS a000000a0, DUT MSTATUS 00000000
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[error] DUT pending exception -1 pending interrupt -1
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Dromajo shows the divergence compared to simulation (PC, inst, inst-bits, write data, etc) and also provides the register state on failure.
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It is useful to catch bugs that affect architectural state before a simulation hangs or crashes.
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To use Dromajo with BOOM, refer to :ref:`Advanced-Concepts/Debugging-RTL:Debugging RTL` section on Dromajo.
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@@ -13,4 +13,3 @@ The following pages will introduce them, and how we can use them in order to gen
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Treadle
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Dsptools
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Barstools
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Dromajo
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