Explicitly provide refClockFreqMHz to harnessClockInstantiator

generators/firechip/src/main/scala/FireSim.scala

@@ -28,7 +28,7 @@ import chipyard.clocking._
   */
 class FireSimClockBridgeInstantiator extends HarnessClockInstantiator {
   // connect all clock wires specified to the RationalClockBridge
-  def instantiateHarnessClocks(refClock: Clock): Unit = {
+  def instantiateHarnessClocks(refClock: Clock, refClockFreqMHz: Double): Unit = {
     val sinks = clockMap.map({ case (name, (freq, bundle)) =>
       ClockSinkParameters(take=Some(ClockParameters(freqMHz=freq / (1000 * 1000))), name=Some(name))
     }).toSeq
@@ -72,6 +72,7 @@ class FireSim(implicit val p: Parameters) extends RawModule with HasHarnessInsta
   // In effect, the bridge counts the length of the reset in terms of this clock.
   resetBridge.io.clock := harnessBinderClock
 
+  def referenceClockFreqMHz = 0.0
   def referenceClock = false.B.asClock // unused
   def referenceReset = resetBridge.io.reset
   def success = { require(false, "success should not be used in Firesim"); false.B }