Explicitly provide refClockFreqMHz to harnessClockInstantiator

2023-05-13 11:18:03 -07:00
parent a89b86c785
commit 2077e4304d
10 changed files with 23 additions and 7 deletions
--- a/fpga/src/main/scala/arty100t/Harness.scala
+++ b/fpga/src/main/scala/arty100t/Harness.scala
@@ -76,6 +76,7 @@ class Arty100THarness(override implicit val p: Parameters) extends Arty100TShell

    harnessSysPLL.plls.foreach(_._1.getReset.get := pllReset)

+    def referenceClockFreqMHz = dutFreqMHz
    def referenceClock = dutClock.in.head._1.clock
    def referenceReset = dutClock.in.head._1.reset
    def success = { require(false, "Unused"); false.B }