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Explicitly provide refClockFreqMHz to harnessClockInstantiator

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This commit is contained in:
Jerry Zhao
2023-05-13 11:18:03 -07:00
parent a89b86c785
commit 2077e4304d
10 changed files with 23 additions and 7 deletions
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2
fpga/src/main/scala/arty/Configs.scala
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@@ -24,7 +24,7 @@ class WithArtyTweaks extends Config(
new chipyard.harness.WithHarnessBinderClockFreqMHz(32) ++
new chipyard.harness.WithAllClocksFromHarnessClockInstantiator ++
new chipyard.config.WithDTSTimebase(32768) ++
new chipyard.config.WithDTSTimebase(32000) ++
new chipyard.config.WithSystemBusFrequency(32) ++
new chipyard.config.WithPeripheryBusFrequency(32) ++
new testchipip.WithNoSerialTL

1
fpga/src/main/scala/arty/TestHarness.scala
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@@ -21,6 +21,7 @@ class ArtyFPGATestHarness(override implicit val p: Parameters) extends ArtyShell
def success = {require(false, "Success not supported"); false.B }
def referenceClockFreqMHz = 32.0
def referenceClock = clock_32MHz
def referenceReset = hReset