wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Fix fpga platforms cbus freq

Browse Source
This commit is contained in:
Jerry Zhao
2023-10-21 15:48:01 -07:00
parent 2a6939cf0a
commit 1e26618e8d
5 changed files with 11 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
fpga/src/main/scala/vc707/Configs.scala
View File

@@ -45,6 +45,7 @@ class WithVC707Tweaks extends Config (
new chipyard.config.WithMemoryBusFrequency(50.0) ++
new chipyard.config.WithSystemBusFrequency(50.0) ++
new chipyard.config.WithPeripheryBusFrequency(50.0) ++
new chipyard.config.WithControlBusFrequency(50.0) ++
new chipyard.harness.WithHarnessBinderClockFreqMHz(50) ++
new WithFPGAFrequency(50) ++ // default 50MHz freq
@@ -75,6 +76,7 @@ class BoomVC707Config extends Config (
class WithFPGAFrequency(fMHz: Double) extends Config (
new chipyard.config.WithPeripheryBusFrequency(fMHz) ++ // assumes using PBUS as default freq.
new chipyard.config.WithControlBusFrequency(fMHz) ++
new chipyard.config.WithMemoryBusFrequency(fMHz)
)