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use pip within conda, update docs + links

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Harrison Liew
2023-02-01 11:19:43 -08:00
committed by abejgonzalez
parent 22fda3a6a7
commit 1dcc7bd9f5
8 changed files with 47 additions and 96 deletions
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docs/VLSI/ASAP7-Tutorial.rst
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@@ -49,31 +49,22 @@ This example gives a suggested file structure and build system. The ``vlsi/`` fo
Prerequisites
-------------
* Python 3.4+
* numpy and `gdstk <https://github.com/heitzmann/gdstk>`__ or `gdspy <https://github.com/heitzmann/gdspy>`__ packages. Note: gdspy must be version 1.4.
* Python 3.9+
* Genus, Innovus, Voltus, VCS, and Calibre licenses
* For ASAP7 specifically (`README <https://github.com/ucb-bar/hammer/tree/master/src/hammer-vlsi/technology/asap7>`__ for more details):
* For ASAP7 specifically (`README <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/asap7>`__ for more details):
* First, download the `ASAP7 v1p7 PDK <https://github.com/The-OpenROAD-Project/asap7>`__ (we recommend shallow-cloning or downloading an archive of the repository). Then, download the `encrypted Calibre decks tarball <http://asap.asu.edu/asap/>`__ tarball to a directory of choice (e.g. the root directory of the PDK) but do not extract it like the instructions say. The tech plugin is configured to extract the tarball into a cache directory for you.
* If you have additional ASAP7 hard macros, their LEF & GDS need to be 4x upscaled @ 4000 DBU precision.
Initial Setup
-------------
In the Chipyard root, run:
In the Chipyard root, ensure that you have the Chipyard conda environment activated. Then, run:
.. code-block:: shell
./scripts/init-vlsi.sh asap7
to pull the Hammer & plugin submodules. Note that for technologies other than ``sky130`` or ``asap7``, the tech submodule must be added in the ``vlsi`` folder first.
Pull the Hammer environment into the shell:
.. code-block:: shell
cd vlsi
export HAMMER_HOME=$PWD/hammer
source $HAMMER_HOME/sourceme.sh
to pull and install the plugin submodules. Note that for technologies other than ``sky130`` or ``asap7``, the tech submodule must be added in the ``vlsi`` folder first.
Building the Design
--------------------
@@ -139,7 +130,7 @@ To run DRC & LVS, and view the results in Calibre:
make lvs CONFIG=TinyRocketConfig
./build/lvs-rundir/generated-scripts/view-lvs
Some DRC errors are expected from this PDK, as explained in the `ASAP7 plugin readme <https://github.com/ucb-bar/hammer/tree/master/src/hammer-vlsi/technology/asap7>`__.
Some DRC errors are expected from this PDK, as explained in the `ASAP7 plugin readme <https://github.com/ucb-bar/hammer/blob/master/hammer/technology/asap7>`__.
Furthermore, the dummy SRAMs that are provided in this tutorial and PDK do not have any geometry inside, so will certainly cause DRC errors.
Simulation