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Remove GenerateSimFiles and use make instead

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This commit is contained in:
abejgonzalez
2021-05-06 00:27:11 -07:00
parent ff02977c5c
commit 1d52899736
10 changed files with 69 additions and 160 deletions
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13
variables.mk
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@@ -106,9 +106,12 @@ endif
#########################################################################################
# path to rocket-chip and testchipip
#########################################################################################
ROCKETCHIP_DIR = $(base_dir)/generators/rocket-chip
TESTCHIP_DIR = $(base_dir)/generators/testchipip
CHIPYARD_FIRRTL_DIR = $(base_dir)/tools/firrtl
ROCKETCHIP_DIR = $(base_dir)/generators/rocket-chip
ROCKETCHIP_RSRCS_DIR = $(ROCKETCHIP_DIR)/src/main/resources
TESTCHIP_DIR = $(base_dir)/generators/testchipip
TESTCHIP_RSRCS_DIR = $(TESTCHIP_DIR)/src/main/resources
CHIPYARD_FIRRTL_DIR = $(base_dir)/tools/firrtl
CHIPYARD_RSRCS_DIR = $(base_dir)/generators/chipyard/src/main/resources
#########################################################################################
# names of various files needed to compile and run things
@@ -135,7 +138,11 @@ HARNESS_SMEMS_FILE ?= $(build_dir)/$(long_name).harness.mems.v
HARNESS_SMEMS_CONF ?= $(build_dir)/$(long_name).harness.mems.conf
HARNESS_SMEMS_FIR ?= $(build_dir)/$(long_name).harness.mems.fir
BOOTROM_FILES ?= bootrom.rv64.img bootrom.rv32.img
BOOTROM_TARGETS ?= $(addprefix $(build_dir)/, $(BOOTROM_FILES))
# files that contain lists of files needed for VCS or Verilator simulation
SIM_FILE_REQS =
sim_files ?= $(build_dir)/sim_files.f
sim_top_blackboxes ?= $(build_dir)/firrtl_black_box_resource_files.top.f
sim_harness_blackboxes ?= $(build_dir)/firrtl_black_box_resource_files.harness.f