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Update testchipip with source-synchronous serdes

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This commit is contained in:
Jerry Zhao
2023-12-21 20:33:24 -08:00
parent cfd555ee94
commit 194d4462f9
10 changed files with 60 additions and 41 deletions
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2
generators/firechip/src/main/scala/TargetConfigs.scala
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@@ -260,7 +260,7 @@ class FireSimSmallSystemConfig extends Config(
new freechips.rocketchip.subsystem.WithExtMemSize(1 << 28) ++
new testchipip.serdes.WithSerialTL(Seq(testchipip.serdes.SerialTLParams(
client = Some(testchipip.serdes.SerialTLClientParams(idBits = 4)),
width = 32
phyParams = testchipip.serdes.ExternalSyncSerialParams(width=32)
))) ++
new testchipip.iceblk.WithBlockDevice ++
new chipyard.config.WithUARTInitBaudRate(BigInt(3686400L)) ++