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[docs] update documentation [ci skip] (#393)

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Abraham Gonzalez
2020-01-23 13:36:21 -08:00
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parent 44883b238b
commit 1859054f73
12 changed files with 117 additions and 90 deletions
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docs/Customization/MMIO-Peripherals.rst
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@@ -127,7 +127,7 @@ Now we can test that the GCD is working. The test program is in ``tests/gcd.c``.
This just writes out to the registers we defined earlier.
The base of the module's MMIO region is at 0x2000 by default.
This will be printed out in the address map portion when you generate the verilog code.
This will be printed out in the address map portion when you generate the Verilog code.
You can also see how this changes the emitted ``.json`` addressmap files in ``generated-src``.
Compiling this program with ``make`` produces a ``gcd.riscv`` executable.