Rename offchipbus manager to client
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@@ -65,7 +65,7 @@ class ChipBringupHostConfig extends Config(
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//============================
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//============================
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// Setup bus topology on the bringup system
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// Setup bus topology on the bringup system
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//============================
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//============================
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new testchipip.WithOffchipBusManager(SBUS, // offchip bus hans off the SBUS
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new testchipip.WithOffchipBusClient(SBUS, // offchip bus hans off the SBUS
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blockRange = AddressSet.misaligned(0x80000000L, (BigInt(1) << 30) * 4)) ++ // offchip bus should not see the main memory of the testchip, since that can be accesses directly through this system
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blockRange = AddressSet.misaligned(0x80000000L, (BigInt(1) << 30) * 4)) ++ // offchip bus should not see the main memory of the testchip, since that can be accesses directly through this system
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new testchipip.WithOffchipBus ++ // offchip bus
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new testchipip.WithOffchipBus ++ // offchip bus
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@@ -66,7 +66,7 @@ class dmiRocketConfig extends Config(
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class ManyPeripheralsRocketConfig extends Config(
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class ManyPeripheralsRocketConfig extends Config(
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new testchipip.WithBlockDevice ++ // add block-device module to peripherybus
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new testchipip.WithBlockDevice ++ // add block-device module to peripherybus
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new testchipip.WithOffchipBusManager(MBUS) ++
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new testchipip.WithOffchipBusClient(MBUS) ++
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new testchipip.WithOffchipBus ++
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new testchipip.WithOffchipBus ++
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new testchipip.WithSerialTLMem(isMainMemory=true) ++ // set lbwif memory base to DRAM_BASE, use as main memory
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new testchipip.WithSerialTLMem(isMainMemory=true) ++ // set lbwif memory base to DRAM_BASE, use as main memory
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new chipyard.harness.WithSimSPIFlashModel(true) ++ // add the SPI flash model in the harness (read-only)
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new chipyard.harness.WithSimSPIFlashModel(true) ++ // add the SPI flash model in the harness (read-only)
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