DiGraph was being being confused with the DigGraph in firrtl. This led to pathological exceptions (#22)
No such method error on accessing a lazy val. InstanceGraph seemed also to be a duplicate of firrtl code --- IOPadSpec fails no two tests but these seem to be at least an ordinary error. And should be debugged separately
This commit is contained in:
Chick Markley
committed by
Colin Schmidt
Colin Schmidt
parent
5b5c8c82db
commit
16846b86fd
@@ -1,158 +0,0 @@
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package firrtl
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import scala.collection.immutable.{HashSet, HashMap}
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import scala.collection.mutable
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import scala.collection.mutable.MultiMap
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class MutableDiGraph[T](
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val edgeData: MultiMap[T,T] = new mutable.HashMap[T, mutable.Set[T]] with MultiMap[T, T]) {
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def contains(v: T) = edgeData.contains(v)
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def getVertices = edgeData.keys
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def getEdges(v: T) = edgeData(v)
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def addVertex(v: T): T = {
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edgeData.getOrElseUpdate(v,new mutable.HashSet[T])
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v
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}
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// Add v to keys to maintain invariant
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def addEdge(u: T, v: T) = {
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edgeData.getOrElseUpdate(v, new mutable.HashSet[T])
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edgeData.addBinding(u,v)
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}
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}
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object DiGraph {
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def apply[T](mdg: MutableDiGraph[T]) = new DiGraph((mdg.edgeData mapValues { _.toSet }).toMap[T, Set[T]])
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def apply[T](edgeData: MultiMap[T,T]) = new DiGraph((edgeData mapValues { _.toSet }).toMap[T, Set[T]])
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}
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class DiGraph[T] (val edges: Map[T, Set[T]]) {
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def getVertices = edges.keys
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def getEdges(v: T) = edges.getOrElse(v, new HashSet[T])
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// Graph must be acyclic for valid linearization
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def linearize(root: T) = {
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val order = new mutable.ArrayBuffer[T]
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val visited = new mutable.HashSet[T]
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def explore(v: T): Unit = {
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visited += v
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for (u <- getEdges(v)) {
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if (!visited.contains(u)) {
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explore(u)
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}
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}
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order.append(v)
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}
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explore(root)
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order.reverse.toList
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}
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def doBFS(root: T) = {
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val prev = new mutable.HashMap[T,T]
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val queue = new mutable.Queue[T]
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queue.enqueue(root)
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while (!queue.isEmpty) {
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val u = queue.dequeue
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for (v <- getEdges(u)) {
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if (!prev.contains(v)) {
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prev(v) = u
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queue.enqueue(v)
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}
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}
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}
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prev
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}
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def reachabilityBFS(root: T) = doBFS(root).keys.toSet
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def path(start: T, end: T) = {
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val nodePath = new mutable.ArrayBuffer[T]
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val prev = doBFS(start)
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nodePath += end
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while (nodePath.last != start) {
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nodePath += prev(nodePath.last)
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}
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nodePath.toList.reverse
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}
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def findSCCs = {
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var counter: BigInt = 0
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val stack = new mutable.Stack[T]
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val onstack = new mutable.HashSet[T]
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val indices = new mutable.HashMap[T, BigInt]
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val lowlinks = new mutable.HashMap[T, BigInt]
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val sccs = new mutable.ArrayBuffer[List[T]]
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def strongConnect(v: T): Unit = {
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indices(v) = counter
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lowlinks(v) = counter
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counter = counter + 1
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stack.push(v)
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onstack += v
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for (w <- getEdges(v)) {
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if (!indices.contains(w)) {
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strongConnect(w)
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lowlinks(v) = lowlinks(v).min(lowlinks(w))
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} else if (onstack.contains(w)) {
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lowlinks(v) = lowlinks(v).min(indices(w))
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}
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}
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if (lowlinks(v) == indices(v)) {
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val scc = new mutable.ArrayBuffer[T]
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do {
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val w = stack.pop
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onstack -= w
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scc += w
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}
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while (scc.last != v);
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sccs.append(scc.toList)
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}
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}
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for (v <- getVertices) {
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strongConnect(v)
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}
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sccs.toList
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}
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def pathsInDAG(start: T): Map[T,List[List[T]]] = {
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// paths(v) holds the set of paths from start to v
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val paths = new mutable.HashMap[T,mutable.Set[List[T]]] with mutable.MultiMap[T,List[T]]
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val queue = new mutable.Queue[T]
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val visited = new mutable.HashSet[T]
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paths.addBinding(start,List(start))
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queue.enqueue(start)
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visited += start
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while (!queue.isEmpty) {
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val current = queue.dequeue
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for (v <- getEdges(current)) {
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if (!visited.contains(v)) {
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queue.enqueue(v)
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visited += v
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}
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for (p <- paths(current)) {
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paths.addBinding(v, p :+ v)
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}
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}
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}
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(paths map { case (k,v) => (k,v.toList) }).toMap
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}
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def reverse = {
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val mdg = new MutableDiGraph[T]
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edges foreach { case (u,edges) => edges.foreach({ v => mdg.addEdge(v,u) }) }
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DiGraph(mdg)
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}
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def simplify(vprime: Set[T]) = {
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val eprime = vprime.map( v => (v,reachabilityBFS(v) & vprime) ).toMap
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new DiGraph(eprime)
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}
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def transformNodes[Q](f: (T) => Q): DiGraph[Q] = {
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val eprime = edges.map({ case (k,v) => (f(k),v.map(f(_))) })
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new DiGraph(eprime)
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}
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}
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@@ -1,51 +0,0 @@
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package firrtl.analyses
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import scala.collection.mutable
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import firrtl._
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import firrtl.ir._
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import firrtl.Utils._
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import firrtl.Mappers._
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class InstanceGraph(c: Circuit) {
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private def collectInstances(insts: mutable.Set[WDefInstance])(s: Statement): Statement = s match {
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case i: WDefInstance =>
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insts += i
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i
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case _ =>
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s map collectInstances(insts)
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s
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}
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val moduleMap = c.modules.map({m => (m.name,m) }).toMap
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val childInstances =
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new mutable.HashMap[String,mutable.Set[WDefInstance]]
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for (m <- c.modules) {
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childInstances(m.name) = new mutable.HashSet[WDefInstance]
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m map collectInstances(childInstances(m.name))
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}
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val instanceGraph = new MutableDiGraph[WDefInstance]
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val instanceQueue = new mutable.Queue[WDefInstance]
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val topInstance = WDefInstance(c.main,c.main) // top instance
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instanceQueue.enqueue(topInstance)
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while (!instanceQueue.isEmpty) {
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val current = instanceQueue.dequeue
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for (child <- childInstances(current.module)) {
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if (!instanceGraph.contains(child)) {
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instanceQueue.enqueue(child)
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}
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instanceGraph.addEdge(current,child)
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}
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}
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val graph = DiGraph(instanceGraph)
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lazy val fullHierarchy = graph.pathsInDAG(topInstance)
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def findInstancesInHierarchy(module: String): List[List[WDefInstance]] = {
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val instances = graph.getVertices.filter(_.module == module).toList
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instances flatMap { i => fullHierarchy(i) }
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}
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}
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