From 120c096962dce38d77ae3a00511407484278ebd7 Mon Sep 17 00:00:00 2001 From: alonamid Date: Thu, 10 Jun 2021 13:32:57 -0700 Subject: [PATCH] [skip CI] Update docs/VLSI/Tutorial.rst --- docs/VLSI/Tutorial.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/VLSI/Tutorial.rst b/docs/VLSI/Tutorial.rst index b5ef7186..f522da8a 100644 --- a/docs/VLSI/Tutorial.rst +++ b/docs/VLSI/Tutorial.rst @@ -143,7 +143,7 @@ To run DRC & LVS, and view the results in Calibre: ./build/lvs-rundir/generated-scripts/view-lvs Some DRC errors are expected from this PDK, as explained in the `ASAP7 plugin readme `__. -Furthermore, the dummy SRAMs that are provided do not have any geometry inside, so will certainly cause DRC and LVS errors. +Furthermore, the dummy SRAMs that are provided in this tutorial and PDK do not have any geometry inside, so will certainly cause DRC and LVS errors. Simulation ^^^^^^^^^^