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fix test harness builds

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abejgonzalez
2019-04-22 22:36:04 -07:00
parent f11901a393
commit 0e5e1bac15
4 changed files with 18 additions and 11 deletions
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README.md
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@@ -2,7 +2,7 @@
**This branch is under development**
**It currently has many submodules**
**Please run ./scripts/init-submodules-no-riscv-tools.sh to update submodules, unless you want to spend a long time waiting for submodule to clone**
**Please run ./scripts/init-submodules-no-riscv-tools.sh to update submodules, unless you want to spend a long time waiting for submodules to clone**
This is a starter template for your custom RISC-V project. It will allow you
to leverage the Chisel HDL and RocketChip SoC generator to produce a