From 0c1ca5750ea461ca237cdb69dea8279c06b47af4 Mon Sep 17 00:00:00 2001
From: abejgonzalez <abe.j.gonza@gmail.com>
Date: Thu, 2 Nov 2023 17:09:00 -0700
Subject: [PATCH] Add fixes | Bump to 256b SBUS

---
 build.sbt                                     |  4 +-
 generators/caliptra-aes-acc                   |  2 +-
 .../scala/config/RoCCAcceleratorConfigs.scala |  2 +-
 generators/rocc-acc-utils                     |  2 +-
 scripts/insert-includes.py                    | 66 +++++++++++++------
 5 files changed, 51 insertions(+), 25 deletions(-)

diff --git a/build.sbt b/build.sbt
index 19199212..c3be6161 100644
--- a/build.sbt
+++ b/build.sbt
@@ -235,11 +235,11 @@ lazy val nvdla = (project in file("generators/nvdla"))
   .settings(commonSettings)
 
 lazy val caliptra_aes = (project in file("generators/caliptra-aes-acc"))
-  .dependsOn(rocketchip, rocc_acc_utils, midasTargetUtils)
+  .dependsOn(rocketchip, rocc_acc_utils, testchipip, midasTargetUtils)
   .settings(libraryDependencies ++= rocketLibDeps.value)
   .settings(commonSettings)
 
-llazy val rocc_acc_utils = (project in file("generators/rocc-acc-utils"))
+lazy val rocc_acc_utils = (project in file("generators/rocc-acc-utils"))
   .dependsOn(rocketchip)
   .settings(libraryDependencies ++= rocketLibDeps.value)
   .settings(commonSettings)
diff --git a/generators/caliptra-aes-acc b/generators/caliptra-aes-acc
index d667a7a0..350cf7fb 160000
--- a/generators/caliptra-aes-acc
+++ b/generators/caliptra-aes-acc
@@ -1 +1 @@
-Subproject commit d667a7a0fd1f37acb3d4df7acb2024a27e151217
+Subproject commit 350cf7fbf53e8178c716b17cc9939f0ddb5c4a43
diff --git a/generators/chipyard/src/main/scala/config/RoCCAcceleratorConfigs.scala b/generators/chipyard/src/main/scala/config/RoCCAcceleratorConfigs.scala
index 0813b059..0796bade 100644
--- a/generators/chipyard/src/main/scala/config/RoCCAcceleratorConfigs.scala
+++ b/generators/chipyard/src/main/scala/config/RoCCAcceleratorConfigs.scala
@@ -60,5 +60,5 @@ class HwachaLargeBoomConfig extends Config(
 class AES256ECBRocketConfig extends Config(
   new aes.WithAES256ECBAccel ++                                   // use Caliptra AES 256 ECB accelerator
   new freechips.rocketchip.subsystem.WithNBigCores(1) ++
-  new chipyard.config.WithSystemBusWidth(128) ++
+  new chipyard.config.WithSystemBusWidth(256) ++
   new chipyard.config.AbstractConfig)
diff --git a/generators/rocc-acc-utils b/generators/rocc-acc-utils
index fa4e29af..b001c888 160000
--- a/generators/rocc-acc-utils
+++ b/generators/rocc-acc-utils
@@ -1 +1 @@
-Subproject commit fa4e29afcb7547e7951475febceb93cdfe46c76a
+Subproject commit b001c888f9620189cd13d2c6ba19f1e28663a3cb
diff --git a/scripts/insert-includes.py b/scripts/insert-includes.py
index ed6fed73..284da17c 100755
--- a/scripts/insert-includes.py
+++ b/scripts/insert-includes.py
@@ -12,6 +12,8 @@
 import sys
 import re
 import os
+import tempfile
+import shutil
 
 inVlog = sys.argv[1]
 outVlog = sys.argv[2]
@@ -24,28 +26,52 @@ if inVlog == outVlog:
 incDirs = sys.argv[3:]
 print("[INFO] Searching following dirs for includes: " + str(incDirs))
 
-# open file
-with open(inVlog, 'r') as inFile:
-    with open(outVlog, 'w') as outFile:
-        # for each include found, search through all dirs and replace if found, error if not
-        for num, line in enumerate(inFile, 1):
+def process(inF, outF):
+    # open file
+    with open(inF, 'r') as inFile:
+        with open(outF, 'w') as outFile:
+            # for each include found, search through all dirs and replace if found, error if not
+            for num, line in enumerate(inFile, 1):
+                match = re.match(r"^ *`include +\"(.*)\"", line)
+                if match:
+                    # search for include and replace
+                    found = False
+                    for d in incDirs:
+                        potentialIncFileName = d + "/" + match.group(1)
+                        if os.path.exists(potentialIncFileName):
+                            found = True
+                            with open(potentialIncFileName, 'r') as incFile:
+                                for iline in incFile:
+                                    outFile.write(iline)
+                            break
+
+                    # must find something to include with
+                    if not found:
+                        sys.exit("[ERROR] Couldn't replace include \"" + str(match.group(1)) + "\" found on line " + str(num))
+                else:
+                    outFile.write(line)
+
+inF = inVlog
+
+while True:
+    # create a copy of the input
+    fd, temp_path = tempfile.mkstemp()
+    shutil.copy2(inF, temp_path)
+
+    with open(temp_path, 'r') as inFile:
+        anyIncludes = False
+        for line in inFile:
             match = re.match(r"^ *`include +\"(.*)\"", line)
             if match:
-                # search for include and replace
-                found = False
-                for d in incDirs:
-                    potentialIncFileName = d + "/" + match.group(1)
-                    if os.path.exists(potentialIncFileName):
-                        found = True
-                        with open(potentialIncFileName, 'r') as incFile:
-                            for iline in incFile:
-                                outFile.write(iline)
-                        break
+                anyIncludes = True
+                break
 
-                # must find something to include with
-                if not found:
-                    sys.exit("[ERROR] Couldn't replace include \"" + str(match.group(1)) + "\" found on line " + str(num))
-            else:
-                outFile.write(line)
+        if anyIncludes:
+            process(temp_path, outVlog)
+            inF = outVlog
+            os.remove(temp_path)
+        else:
+            os.remove(temp_path)
+            break
 
 print("[INFO] Success. Writing output to: " + str(outVlog))