Move boom's tracegen interface to boom submodule - this improves maintainability
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@@ -8,6 +8,7 @@ import freechips.rocketchip.subsystem._
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import freechips.rocketchip.system.BaseConfig
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import freechips.rocketchip.rocket.DCacheParams
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import freechips.rocketchip.tile.{MaxHartIdBits, XLen}
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import boom.lsu._
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import scala.math.{max, min}
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class WithTraceGen(
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