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[tracegen] Add tracegen support for the BOOM L1D (#362)

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* [tracegen] Add tracegen support for the BOOM L1D

* [tracegen] Split up BOOM Tracegen mixin and shim.

* [ci] Fix tracegen hash for testing
This commit is contained in:
Jerry Zhao
2020-01-23 16:01:32 -08:00
committed by GitHub
parent 1859054f73
commit 05f17f5b99
7 changed files with 301 additions and 7 deletions
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32
generators/tracegen/src/main/scala/Configs.scala
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@@ -32,9 +32,35 @@ class WithTraceGen(params: Seq[DCacheParams], nReqs: Int = 8192)
memStart = site(ExtMem).get.master.base,
numGens = params.size)
}
case MaxHartIdBits => if (params.size == 1) 1 else log2Ceil(params.size)
case MaxHartIdBits => log2Ceil(params.size + up(BoomTraceGenKey, site).length) max 1
})
class WithBoomTraceGen(params: Seq[DCacheParams], nReqs: Int = 8192)
extends Config((site, here, up) => {
case BoomTraceGenKey => params.map { dcp => TraceGenParams(
dcache = Some(dcp),
wordBits = site(XLen),
addrBits = 48,
addrBag = {
val nSets = dcp.nSets
val nWays = dcp.nWays
val blockOffset = site(SystemBusKey).blockOffset
val nBeats = min(2, site(SystemBusKey).blockBeats)
val beatBytes = site(SystemBusKey).beatBytes
List.tabulate(2 * nWays) { i =>
Seq.tabulate(nBeats) { j =>
BigInt((j * beatBytes) + ((i * nSets) << blockOffset))
}
}.flatten
},
maxRequests = nReqs,
memStart = site(ExtMem).get.master.base,
numGens = params.size)
}
case MaxHartIdBits => log2Ceil(params.size + up(TraceGenKey, site).length) max 1
})
class TraceGenConfig extends Config(
new WithTraceGen(List.fill(2) { DCacheParams(nMSHRs = 0, nSets = 16, nWays = 2) }) ++
new BaseConfig)
@@ -43,6 +69,10 @@ class NonBlockingTraceGenConfig extends Config(
new WithTraceGen(List.fill(2) { DCacheParams(nMSHRs = 2, nSets = 16, nWays = 2) }) ++
new BaseConfig)
class BoomTraceGenConfig extends Config(
new WithBoomTraceGen(List.fill(2) { DCacheParams(nMSHRs = 8, nSets = 16, nWays = 2) }) ++
new BaseConfig)
class WithL2TraceGen(params: Seq[DCacheParams], nReqs: Int = 8192)
extends Config((site, here, up) => {
case TraceGenKey => params.map { dcp => TraceGenParams(