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Fix tracegen target and add to CI

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This commit is contained in:
Howard Mao
2019-10-13 05:44:57 -07:00
parent ced4d2eea0
commit 05af2f9a9c
12 changed files with 145 additions and 4 deletions
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6
generators/firechip/src/main/scala/BridgeBinders.scala
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@@ -18,6 +18,7 @@ import midas.models.{FASEDBridge, AXI4EdgeSummary, CompleteConfig}
import firesim.bridges._
import firesim.configs.MemModelKey
import firesim.util.RegisterBridgeBinder
import tracegen.HasTraceGenTilesModuleImp
class WithTiedOffDebug extends RegisterBridgeBinder({ case target: HasPeripheryDebugModuleImp =>
target.debug.clockeddmi.foreach({ cdmi =>
@@ -64,6 +65,11 @@ class WithTracerVBridge extends RegisterBridgeBinder({
case target: HasTraceIOImp => TracerVBridge(target.traceIO)(target.p)
})
class WithTraceGenBridge extends RegisterBridgeBinder({
case target: HasTraceGenTilesModuleImp =>
Seq(GroundTestBridge(target.success)(target.p))
})
// Shorthand to register all of the provided bridges above
class WithDefaultFireSimBridges extends Config(
new WithTiedOffDebug ++