From 03e50178f1f74e6f88225f3960749225f2ed0011 Mon Sep 17 00:00:00 2001 From: Zitao Fang Date: Fri, 14 Aug 2020 16:00:38 -0700 Subject: [PATCH] Add misalignment detection & make M-extension test optional --- generators/chipyard/src/main/scala/TestSuites.scala | 4 ++-- generators/riscv-sodor | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/generators/chipyard/src/main/scala/TestSuites.scala b/generators/chipyard/src/main/scala/TestSuites.scala index 9ca2c08c..8cdfd3c9 100644 --- a/generators/chipyard/src/main/scala/TestSuites.scala +++ b/generators/chipyard/src/main/scala/TestSuites.scala @@ -92,8 +92,8 @@ class TestSuiteHelper } if (coreParams.useCompressed) addSuites(env.map(if (xlen == 64) rv64uc else rv32uc)) val (rvi, rvu) = - if (xlen == 64) ((if (vm) rv64i else rv64pi), rv64u) - else ((if (vm) rv32i else rv32pi), rv32u) + if (xlen == 64) ((if (vm) rv64i else rv64pi), (if (coreParams.mulDiv.isDefined) rv64u else List(rv64ui))) + else ((if (vm) rv32i else rv32pi), (if (coreParams.mulDiv.isDefined) rv32u else List(rv32ui))) addSuites(rvi.map(_("p"))) addSuites(rvu.map(_("p"))) diff --git a/generators/riscv-sodor b/generators/riscv-sodor index 7e7f2d4d..f6d5f45e 160000 --- a/generators/riscv-sodor +++ b/generators/riscv-sodor @@ -1 +1 @@ -Subproject commit 7e7f2d4df1b870b7a877648462b5aa6da0c7e207 +Subproject commit f6d5f45e31cd2f8c4aad64662d7ec0d59545f344