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Fix makefile

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This commit is contained in:
joey0320
2023-03-06 18:26:03 -08:00
parent 2ef3b58cfa
commit 02fd30b2f8
2 changed files with 10 additions and 6 deletions
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14
common.mk
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@@ -29,10 +29,6 @@ EXTRA_SIM_SOURCES ?=
EXTRA_SIM_REQS ?= EXTRA_SIM_REQS ?=
ENABLE_CUSTOM_FIRRTL_PASS += $(ENABLE_VLSI_FLOW) ENABLE_CUSTOM_FIRRTL_PASS += $(ENABLE_VLSI_FLOW)
$(info $$ENABLE_CUSTOM_FIRRTL_PASS is [${ENABLE_CUSTOM_FIRRTL_PASS}])
$(info $$ENABLE_VLSI_FLOW is [${ENABLE_VLSI_FLOW}])
#---------------------------------------------------------------------------- #----------------------------------------------------------------------------
HELP_SIMULATION_VARIABLES += \ HELP_SIMULATION_VARIABLES += \
" EXTRA_SIM_FLAGS = additional runtime simulation flags (passed within +permissive)" \ " EXTRA_SIM_FLAGS = additional runtime simulation flags (passed within +permissive)" \
@@ -165,6 +161,7 @@ SFC_MFC_TARGETS = \
$(GEN_COLLATERAL_DIR) $(GEN_COLLATERAL_DIR)
SFC_REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(SFC_SMEMS_CONF) SFC_REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(SFC_SMEMS_CONF)
MFC_BASE_LOWERING_OPTIONS = emittedLineLength=2048,noAlwaysComb,disallowLocalVariables,verifLabels,locationInfoStyle=wrapInAtSquareBracket
# DOC include start: FirrtlCompiler # DOC include start: FirrtlCompiler
# There are two possible cases for this step. In the first case, SFC # There are two possible cases for this step. In the first case, SFC
@@ -177,13 +174,18 @@ SFC_REPL_SEQ_MEM = --infer-rw --repl-seq-mem -c:$(MODEL):-o:$(SFC_SMEMS_CONF)
# hack: lower to low firrtl if Fixed types are found # hack: lower to low firrtl if Fixed types are found
# hack: when using dontTouch, io.cpu annotations are not removed by SFC, # hack: when using dontTouch, io.cpu annotations are not removed by SFC,
# hence we remove them manually by using jq before passing them to firtool # hence we remove them manually by using jq before passing them to firtool
$(SFC_LEVEL) $(EXTRA_FIRRTL_OPTIONS) $(FINAL_ANNO_FILE) &: $(FIRRTL_FILE) $(EXTRA_ANNO_FILE) $(SFC_EXTRA_ANNO_FILE) $(SFC_LEVEL) $(EXTRA_FIRRTL_OPTIONS) $(FINAL_ANNO_FILE) $(MFC_LOWERING_OPTIONS) &: $(FIRRTL_FILE) $(EXTRA_ANNO_FILE) $(SFC_EXTRA_ANNO_FILE)
ifeq (,$(ENABLE_CUSTOM_FIRRTL_PASS)) ifeq (,$(ENABLE_CUSTOM_FIRRTL_PASS))
$(eval SFC_LEVEL := $(if $(shell grep "Fixed<" $(FIRRTL_FILE)), low, none)) $(eval SFC_LEVEL := $(if $(shell grep "Fixed<" $(FIRRTL_FILE)), low, none))
$(eval EXTRA_FIRRTL_OPTIONS += $(if $(shell grep "Fixed<" $(FIRRTL_FILE)), $(SFC_REPL_SEQ_MEM),)) $(eval EXTRA_FIRRTL_OPTIONS += $(if $(shell grep "Fixed<" $(FIRRTL_FILE)), $(SFC_REPL_SEQ_MEM),))
else else
$(eval SFC_LEVEL := low) $(eval SFC_LEVEL := low)
$(eval EXTRA_FIRRTL_OPTIONS += $(SFC_REPL_SEQ_MEM)) $(eval EXTRA_FIRRTL_OPTIONS += $(SFC_REPL_SEQ_MEM))
endif
ifeq (,$(ENABLE_VLSI_FLOW))
$(eval MFC_LOWERING_OPTIONS = $(MFC_BASE_LOWERING_OPTIONS))
else
$(eval MFC_LOWERING_OPTIONS = $(MFC_BASE_LOWERING_OPTIONS),disallowPackedArrays)
endif endif
if [ $(SFC_LEVEL) = low ]; then jq -s '[.[][]]' $(EXTRA_ANNO_FILE) $(SFC_EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE); fi if [ $(SFC_LEVEL) = low ]; then jq -s '[.[][]]' $(EXTRA_ANNO_FILE) $(SFC_EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE); fi
if [ $(SFC_LEVEL) = none ]; then cat $(EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE); fi if [ $(SFC_LEVEL) = none ]; then cat $(EXTRA_ANNO_FILE) > $(FINAL_ANNO_FILE); fi
@@ -215,7 +217,7 @@ $(SFC_MFC_TARGETS) &: $(FIRRTL_FILE) $(FINAL_ANNO_FILE) $(VLOG_SOURCES) $(SFC_LE
--disable-annotation-classless \ --disable-annotation-classless \
--disable-annotation-unknown \ --disable-annotation-unknown \
--mlir-timing \ --mlir-timing \
--lowering-options=emittedLineLength=2048,noAlwaysComb,disallowLocalVariables,disallowPackedArrays,verifLabels,locationInfoStyle=wrapInAtSquareBracket \ --lowering-options=$(MFC_LOWERING_OPTIONS) \
--repl-seq-mem \ --repl-seq-mem \
--repl-seq-mem-file=$(MFC_SMEMS_CONF) \ --repl-seq-mem-file=$(MFC_SMEMS_CONF) \
--repl-seq-mem-circuit=$(MODEL) \ --repl-seq-mem-circuit=$(MODEL) \

2
vlsi/Makefile
View File

@@ -51,6 +51,8 @@ else
OBJ_DIR ?= $(vlsi_dir)/$(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP) OBJ_DIR ?= $(vlsi_dir)/$(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP)
endif endif
ENABLE_VLSI_FLOW ?= 1
######################################################################################### #########################################################################################
# general rules # general rules
######################################################################################### #########################################################################################