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Update documentation source pointers

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This commit is contained in:
Jerry Zhao
2023-02-11 12:48:40 -08:00
parent 7a8bbd0747
commit 0190da20f0
6 changed files with 8 additions and 8 deletions
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docs/Customization/Incorporating-Verilog-Blocks.rst
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@@ -116,7 +116,7 @@ Defining a Chip with a BlackBox
Since we've parameterized the GCD instantiation to choose between the
Chisel and the Verilog module, creating a config is easy.
.. literalinclude:: ../../generators/chipyard/src/main/scala/config/RocketConfigs.scala
.. literalinclude:: ../../generators/chipyard/src/main/scala/config/MMIOAcceleratorConfigs.scala
:language: scala
:start-after: DOC include start: GCDAXI4BlackBoxRocketConfig
:end-before: DOC include end: GCDAXI4BlackBoxRocketConfig