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Update path to WithMemtraceCore

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This commit is contained in:
Hansung Kim
2023-05-09 22:23:36 -07:00
parent 58f3fc221c
commit 013782a5db
1 changed files with 3 additions and 4 deletions
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7
generators/chipyard/src/main/scala/config/GPUConfig.scala
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@@ -4,8 +4,9 @@ import org.chipsalliance.cde.config.{Config}
import freechips.rocketchip.diplomacy.{AsynchronousCrossing} import freechips.rocketchip.diplomacy.{AsynchronousCrossing}
class MemtraceCoreConfig extends Config( class MemtraceCoreConfig extends Config(
// Memtrace core // Memtrace
new freechips.rocketchip.tilelink.WithMemtraceCore("vecadd.core1.thread4.trace")++ new freechips.rocketchip.subsystem.WithMemtraceCore("vecadd.core1.thread4.trace",
traceHasSource = true) ++
new freechips.rocketchip.subsystem.WithNLanes(4) ++ new freechips.rocketchip.subsystem.WithNLanes(4) ++
// L2 // L2
new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=8, capacityKB=512) ++ new freechips.rocketchip.subsystem.WithInclusiveCache(nWays=8, capacityKB=512) ++
@@ -15,5 +16,3 @@ class MemtraceCoreConfig extends Config(
new freechips.rocketchip.subsystem.WithNCustomSmallCores(1) ++ new freechips.rocketchip.subsystem.WithNCustomSmallCores(1) ++
new chipyard.config.AbstractConfig new chipyard.config.AbstractConfig
) )