/*
 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *  * Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *  * Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *  * Neither the name of NVIDIA CORPORATION nor the names of its
 *    contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef __OPENDLA_SMALL_H_
#define __OPENDLA_SMALL_H_

// Register NVDLA_CFGROM_CFGROM_HW_VERSION_0
#define NVDLA_CFGROM_CFGROM_HW_VERSION_0			_MK_ADDR_CONST(0x0)
#define NVDLA_CFGROM_CFGROM_HW_VERSION_0_HW_VERSION_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_HW_VERSION_0_HW_VERSION_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_HW_VERSION_0_HW_VERSION_SHIFT)


// Register NVDLA_CFGROM_CFGROM_GLB_DESC_0
#define NVDLA_CFGROM_CFGROM_GLB_DESC_0			_MK_ADDR_CONST(0x4)
#define NVDLA_CFGROM_CFGROM_GLB_DESC_0_GLB_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_GLB_DESC_0_GLB_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_GLB_DESC_0_GLB_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_DESC_0
#define NVDLA_CFGROM_CFGROM_CIF_DESC_0			_MK_ADDR_CONST(0x8)
#define NVDLA_CFGROM_CFGROM_CIF_DESC_0_CIF_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CIF_DESC_0_CIF_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CIF_DESC_0_CIF_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CIF_CAP_INCOMPAT_0			_MK_ADDR_CONST(0xc)
#define NVDLA_CFGROM_CFGROM_CIF_CAP_INCOMPAT_0_CIF_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CIF_CAP_INCOMPAT_0_CIF_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CIF_CAP_INCOMPAT_0_CIF_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CIF_CAP_COMPAT_0			_MK_ADDR_CONST(0x10)
#define NVDLA_CFGROM_CFGROM_CIF_CAP_COMPAT_0_CIF_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CIF_CAP_COMPAT_0_CIF_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CIF_CAP_COMPAT_0_CIF_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_BASE_WIDTH_0
#define NVDLA_CFGROM_CFGROM_CIF_BASE_WIDTH_0			_MK_ADDR_CONST(0x14)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_WIDTH_0_CIF_BASE_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_WIDTH_0_CIF_BASE_WIDTH_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CFGROM_CFGROM_CIF_BASE_WIDTH_0_CIF_BASE_WIDTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_BASE_LATENCY_0
#define NVDLA_CFGROM_CFGROM_CIF_BASE_LATENCY_0			_MK_ADDR_CONST(0x18)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_LATENCY_0_CIF_BASE_LATENCY_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_LATENCY_0_CIF_BASE_LATENCY_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CIF_BASE_LATENCY_0_CIF_BASE_LATENCY_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_BASE_BURST_LENGTH_MAX_0
#define NVDLA_CFGROM_CFGROM_CIF_BASE_BURST_LENGTH_MAX_0			_MK_ADDR_CONST(0x1c)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_BURST_LENGTH_MAX_0_BASE_BURST_LENGTH_MAX_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_BURST_LENGTH_MAX_0_BASE_BURST_LENGTH_MAX_FIELD			_MK_FIELD_CONST(0x7ffffff, NVDLA_CFGROM_CFGROM_CIF_BASE_BURST_LENGTH_MAX_0_BASE_BURST_LENGTH_MAX_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CIF_BASE_MEM_ADDR_WIDTH_0
#define NVDLA_CFGROM_CFGROM_CIF_BASE_MEM_ADDR_WIDTH_0			_MK_ADDR_CONST(0x20)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_MEM_ADDR_WIDTH_0_CIF_BASE_MEM_ADDR_WIDTH_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_CFGROM_CFGROM_CIF_BASE_MEM_ADDR_WIDTH_0_CIF_BASE_MEM_ADDR_WIDTH_FIELD			_MK_FIELD_CONST(0x7ffffff, NVDLA_CFGROM_CFGROM_CIF_BASE_MEM_ADDR_WIDTH_0_CIF_BASE_MEM_ADDR_WIDTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_DESC_0
#define NVDLA_CFGROM_CFGROM_CDMA_DESC_0			_MK_ADDR_CONST(0x24)
#define NVDLA_CFGROM_CFGROM_CDMA_DESC_0_CDMA_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_DESC_0_CDMA_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_DESC_0_CDMA_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CDMA_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x28)
#define NVDLA_CFGROM_CFGROM_CDMA_CAP_INCOMPAT_0_CDMA_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_CAP_INCOMPAT_0_CDMA_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_CAP_INCOMPAT_0_CDMA_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CDMA_CAP_COMPAT_0			_MK_ADDR_CONST(0x2c)
#define NVDLA_CFGROM_CFGROM_CDMA_CAP_COMPAT_0_CDMA_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_CAP_COMPAT_0_CDMA_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_CAP_COMPAT_0_CDMA_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0x30)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_FEATURE_TYPES_0_CDMA_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_FEATURE_TYPES_0_CDMA_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CDMA_BASE_FEATURE_TYPES_0_CDMA_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_WEIGHT_TYPES_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_WEIGHT_TYPES_0			_MK_ADDR_CONST(0x34)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_WEIGHT_TYPES_0_CDMA_BASE_WEIGHT_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_WEIGHT_TYPES_0_CDMA_BASE_WEIGHT_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CDMA_BASE_WEIGHT_TYPES_0_CDMA_BASE_WEIGHT_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_C_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_C_0			_MK_ADDR_CONST(0x38)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_C_0_CDMA_BASE_ATOMIC_C_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_C_0_CDMA_BASE_ATOMIC_C_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_C_0_CDMA_BASE_ATOMIC_C_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_K_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_K_0			_MK_ADDR_CONST(0x3c)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_K_0_CDMA_BASE_ATOMIC_K_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_K_0_CDMA_BASE_ATOMIC_K_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_K_0_CDMA_BASE_ATOMIC_K_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_M_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_M_0			_MK_ADDR_CONST(0x40)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_M_0_CDMA_BASE_ATOMIC_M_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_M_0_CDMA_BASE_ATOMIC_M_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_BASE_ATOMIC_M_0_CDMA_BASE_ATOMIC_M_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_NUM_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_NUM_0			_MK_ADDR_CONST(0x44)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_NUM_0_CDMA_BASE_CBUF_BANK_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_NUM_0_CDMA_BASE_CBUF_BANK_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_NUM_0_CDMA_BASE_CBUF_BANK_NUM_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_WIDTH_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_WIDTH_0			_MK_ADDR_CONST(0x48)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_WIDTH_0_CDMA_BASE_CBUF_BANK_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_WIDTH_0_CDMA_BASE_CBUF_BANK_WIDTH_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_WIDTH_0_CDMA_BASE_CBUF_BANK_WIDTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_DEPTH_0
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_DEPTH_0			_MK_ADDR_CONST(0x4c)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_DEPTH_0_CDMA_BASE_CBUF_BANK_DEPTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_DEPTH_0_CDMA_BASE_CBUF_BANK_DEPTH_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_BASE_CBUF_BANK_DEPTH_0_CDMA_BASE_CBUF_BANK_DEPTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_MULTI_BATCH_MAX_0
#define NVDLA_CFGROM_CFGROM_CDMA_MULTI_BATCH_MAX_0			_MK_ADDR_CONST(0x50)
#define NVDLA_CFGROM_CFGROM_CDMA_MULTI_BATCH_MAX_0_CDMA_MULTI_BATCH_MAX_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_MULTI_BATCH_MAX_0_CDMA_MULTI_BATCH_MAX_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_MULTI_BATCH_MAX_0_CDMA_MULTI_BATCH_MAX_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_PACKED_0
#define NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_PACKED_0			_MK_ADDR_CONST(0x54)
#define NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_PACKED_0_CDMA_IMAGE_IN_FORMATS_PACKED_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_PACKED_0_CDMA_IMAGE_IN_FORMATS_PACKED_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_PACKED_0_CDMA_IMAGE_IN_FORMATS_PACKED_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_SEMI_0
#define NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_SEMI_0			_MK_ADDR_CONST(0x58)
#define NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_SEMI_0_CDMA_IMAGE_IN_FORMATS_SEMI_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_SEMI_0_CDMA_IMAGE_IN_FORMATS_SEMI_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDMA_IMAGE_IN_FORMATS_SEMI_0_CDMA_IMAGE_IN_FORMATS_SEMI_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_DESC_0
#define NVDLA_CFGROM_CFGROM_CBUF_DESC_0			_MK_ADDR_CONST(0x5c)
#define NVDLA_CFGROM_CFGROM_CBUF_DESC_0_CBUF_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_DESC_0_CBUF_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_DESC_0_CBUF_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CBUF_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x60)
#define NVDLA_CFGROM_CFGROM_CBUF_CAP_INCOMPAT_0_CBUF_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_CAP_INCOMPAT_0_CBUF_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_CAP_INCOMPAT_0_CBUF_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CBUF_CAP_COMPAT_0			_MK_ADDR_CONST(0x64)
#define NVDLA_CFGROM_CFGROM_CBUF_CAP_COMPAT_0_CBUF_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_CAP_COMPAT_0_CBUF_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_CAP_COMPAT_0_CBUF_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_NUM_0
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_NUM_0			_MK_ADDR_CONST(0x68)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_NUM_0_CBUF_BASE_CBUF_BANK_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_NUM_0_CBUF_BASE_CBUF_BANK_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_NUM_0_CBUF_BASE_CBUF_BANK_NUM_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_WIDTH_0
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_WIDTH_0			_MK_ADDR_CONST(0x6c)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_WIDTH_0_CBUF_BASE_CBUF_BANK_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_WIDTH_0_CBUF_BASE_CBUF_BANK_WIDTH_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_WIDTH_0_CBUF_BASE_CBUF_BANK_WIDTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_DEPTH_0
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_DEPTH_0			_MK_ADDR_CONST(0x70)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_DEPTH_0_CBUF_BASE_CBUF_BANK_DEPTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_DEPTH_0_CBUF_BASE_CBUF_BANK_DEPTH_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_BASE_CBUF_BANK_DEPTH_0_CBUF_BASE_CBUF_BANK_DEPTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CBUF_BASE_CDMA_ID_0
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CDMA_ID_0			_MK_ADDR_CONST(0x74)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CDMA_ID_0_CBUF_BASE_CDMA_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CBUF_BASE_CDMA_ID_0_CBUF_BASE_CDMA_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CBUF_BASE_CDMA_ID_0_CBUF_BASE_CDMA_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_DESC_0
#define NVDLA_CFGROM_CFGROM_CSC_DESC_0			_MK_ADDR_CONST(0x78)
#define NVDLA_CFGROM_CFGROM_CSC_DESC_0_CSC_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_DESC_0_CSC_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_DESC_0_CSC_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CSC_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x7c)
#define NVDLA_CFGROM_CFGROM_CSC_CAP_INCOMPAT_0_CSC_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_CAP_INCOMPAT_0_CSC_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_CAP_INCOMPAT_0_CSC_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CSC_CAP_COMPAT_0			_MK_ADDR_CONST(0x80)
#define NVDLA_CFGROM_CFGROM_CSC_CAP_COMPAT_0_CSC_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_CAP_COMPAT_0_CSC_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_CAP_COMPAT_0_CSC_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0x84)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_FEATURE_TYPES_0_CSC_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_FEATURE_TYPES_0_CSC_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CSC_BASE_FEATURE_TYPES_0_CSC_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_WEIGHT_TYPES_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_WEIGHT_TYPES_0			_MK_ADDR_CONST(0x88)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_WEIGHT_TYPES_0_CSC_BASE_WEIGHT_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_WEIGHT_TYPES_0_CSC_BASE_WEIGHT_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CSC_BASE_WEIGHT_TYPES_0_CSC_BASE_WEIGHT_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_C_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_C_0			_MK_ADDR_CONST(0x8c)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_C_0_CSC_BASE_ATOMIC_C_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_C_0_CSC_BASE_ATOMIC_C_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_C_0_CSC_BASE_ATOMIC_C_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_K_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_K_0			_MK_ADDR_CONST(0x90)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_K_0_CSC_BASE_ATOMIC_K_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_K_0_CSC_BASE_ATOMIC_K_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_K_0_CSC_BASE_ATOMIC_K_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_M_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_M_0			_MK_ADDR_CONST(0x94)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_M_0_CSC_BASE_ATOMIC_M_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_M_0_CSC_BASE_ATOMIC_M_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_ATOMIC_M_0_CSC_BASE_ATOMIC_M_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_NUM_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_NUM_0			_MK_ADDR_CONST(0x98)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_NUM_0_CSC_BASE_CBUF_BANK_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_NUM_0_CSC_BASE_CBUF_BANK_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_NUM_0_CSC_BASE_CBUF_BANK_NUM_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_WIDTH_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_WIDTH_0			_MK_ADDR_CONST(0x9c)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_WIDTH_0_CSC_BASE_CBUF_BANK_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_WIDTH_0_CSC_BASE_CBUF_BANK_WIDTH_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_WIDTH_0_CSC_BASE_CBUF_BANK_WIDTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_DEPTH_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_DEPTH_0			_MK_ADDR_CONST(0xa0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_DEPTH_0_CSC_BASE_CBUF_BANK_DEPTH_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_DEPTH_0_CSC_BASE_CBUF_BANK_DEPTH_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_CBUF_BANK_DEPTH_0_CSC_BASE_CBUF_BANK_DEPTH_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_BASE_CDMA_ID_0
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CDMA_ID_0			_MK_ADDR_CONST(0xa4)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CDMA_ID_0_CSC_BASE_CDMA_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_BASE_CDMA_ID_0_CSC_BASE_CDMA_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_BASE_CDMA_ID_0_CSC_BASE_CDMA_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CSC_MULTI_BATCH_MAX_0
#define NVDLA_CFGROM_CFGROM_CSC_MULTI_BATCH_MAX_0			_MK_ADDR_CONST(0xa8)
#define NVDLA_CFGROM_CFGROM_CSC_MULTI_BATCH_MAX_0_CSC_MULTI_BATCH_MAX_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CSC_MULTI_BATCH_MAX_0_CSC_MULTI_BATCH_MAX_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CSC_MULTI_BATCH_MAX_0_CSC_MULTI_BATCH_MAX_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_DESC_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_DESC_0			_MK_ADDR_CONST(0xac)
#define NVDLA_CFGROM_CFGROM_CMAC_A_DESC_0_CMAC_A_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_DESC_0_CMAC_A_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_A_DESC_0_CMAC_A_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_CAP_INCOMPAT_0			_MK_ADDR_CONST(0xb0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_CAP_INCOMPAT_0_CMAC_A_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_CAP_INCOMPAT_0_CMAC_A_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_A_CAP_INCOMPAT_0_CMAC_A_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_CAP_COMPAT_0			_MK_ADDR_CONST(0xb4)
#define NVDLA_CFGROM_CFGROM_CMAC_A_CAP_COMPAT_0_CMAC_A_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_CAP_COMPAT_0_CMAC_A_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_A_CAP_COMPAT_0_CMAC_A_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0xb8)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_FEATURE_TYPES_0_CMAC_A_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_FEATURE_TYPES_0_CMAC_A_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CMAC_A_BASE_FEATURE_TYPES_0_CMAC_A_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_BASE_WEIGHT_TYPES_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_WEIGHT_TYPES_0			_MK_ADDR_CONST(0xbc)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_WEIGHT_TYPES_0_CMAC_A_BASE_WEIGHT_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_WEIGHT_TYPES_0_CMAC_A_BASE_WEIGHT_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CMAC_A_BASE_WEIGHT_TYPES_0_CMAC_A_BASE_WEIGHT_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_C_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_C_0			_MK_ADDR_CONST(0xc0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_C_0_CMAC_A_BASE_ATOMIC_C_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_C_0_CMAC_A_BASE_ATOMIC_C_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_C_0_CMAC_A_BASE_ATOMIC_C_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_K_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_K_0			_MK_ADDR_CONST(0xc4)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_K_0_CMAC_A_BASE_ATOMIC_K_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_K_0_CMAC_A_BASE_ATOMIC_K_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_A_BASE_ATOMIC_K_0_CMAC_A_BASE_ATOMIC_K_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_A_BASE_CDMA_ID_0
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_CDMA_ID_0			_MK_ADDR_CONST(0xc8)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_CDMA_ID_0_CMAC_A_BASE_CDMA_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_A_BASE_CDMA_ID_0_CMAC_A_BASE_CDMA_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_A_BASE_CDMA_ID_0_CMAC_A_BASE_CDMA_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_DESC_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_DESC_0			_MK_ADDR_CONST(0xcc)
#define NVDLA_CFGROM_CFGROM_CMAC_B_DESC_0_CMAC_B_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_DESC_0_CMAC_B_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_B_DESC_0_CMAC_B_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_CAP_INCOMPAT_0			_MK_ADDR_CONST(0xd0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_CAP_INCOMPAT_0_CMAC_B_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_CAP_INCOMPAT_0_CMAC_B_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_B_CAP_INCOMPAT_0_CMAC_B_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_CAP_COMPAT_0			_MK_ADDR_CONST(0xd4)
#define NVDLA_CFGROM_CFGROM_CMAC_B_CAP_COMPAT_0_CMAC_B_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_CAP_COMPAT_0_CMAC_B_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_B_CAP_COMPAT_0_CMAC_B_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0xd8)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_FEATURE_TYPES_0_CMAC_B_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_FEATURE_TYPES_0_CMAC_B_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CMAC_B_BASE_FEATURE_TYPES_0_CMAC_B_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_BASE_WEIGHT_TYPES_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_WEIGHT_TYPES_0			_MK_ADDR_CONST(0xdc)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_WEIGHT_TYPES_0_CMAC_B_BASE_WEIGHT_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_WEIGHT_TYPES_0_CMAC_B_BASE_WEIGHT_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CMAC_B_BASE_WEIGHT_TYPES_0_CMAC_B_BASE_WEIGHT_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_C_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_C_0			_MK_ADDR_CONST(0xe0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_C_0_CMAC_B_BASE_ATOMIC_C_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_C_0_CMAC_B_BASE_ATOMIC_C_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_C_0_CMAC_B_BASE_ATOMIC_C_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_K_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_K_0			_MK_ADDR_CONST(0xe4)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_K_0_CMAC_B_BASE_ATOMIC_K_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_K_0_CMAC_B_BASE_ATOMIC_K_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_B_BASE_ATOMIC_K_0_CMAC_B_BASE_ATOMIC_K_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CMAC_B_BASE_CDMA_ID_0
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_CDMA_ID_0			_MK_ADDR_CONST(0xe8)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_CDMA_ID_0_CMAC_B_BASE_CDMA_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CMAC_B_BASE_CDMA_ID_0_CMAC_B_BASE_CDMA_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CMAC_B_BASE_CDMA_ID_0_CMAC_B_BASE_CDMA_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_DESC_0
#define NVDLA_CFGROM_CFGROM_CACC_DESC_0			_MK_ADDR_CONST(0xec)
#define NVDLA_CFGROM_CFGROM_CACC_DESC_0_CACC_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_DESC_0_CACC_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_DESC_0_CACC_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CACC_CAP_INCOMPAT_0			_MK_ADDR_CONST(0xf0)
#define NVDLA_CFGROM_CFGROM_CACC_CAP_INCOMPAT_0_CACC_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_CAP_INCOMPAT_0_CACC_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_CAP_INCOMPAT_0_CACC_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CACC_CAP_COMPAT_0			_MK_ADDR_CONST(0xf4)
#define NVDLA_CFGROM_CFGROM_CACC_CAP_COMPAT_0_CACC_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_CAP_COMPAT_0_CACC_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_CAP_COMPAT_0_CACC_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_CACC_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0xf8)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_FEATURE_TYPES_0_CACC_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_FEATURE_TYPES_0_CACC_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CACC_BASE_FEATURE_TYPES_0_CACC_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_BASE_WEIGHT_TYPES_0
#define NVDLA_CFGROM_CFGROM_CACC_BASE_WEIGHT_TYPES_0			_MK_ADDR_CONST(0xfc)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_WEIGHT_TYPES_0_CACC_BASE_WEIGHT_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_WEIGHT_TYPES_0_CACC_BASE_WEIGHT_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CACC_BASE_WEIGHT_TYPES_0_CACC_BASE_WEIGHT_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_C_0
#define NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_C_0			_MK_ADDR_CONST(0x100)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_C_0_CACC_BASE_ATOMIC_C_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_C_0_CACC_BASE_ATOMIC_C_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_C_0_CACC_BASE_ATOMIC_C_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_K_0
#define NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_K_0			_MK_ADDR_CONST(0x104)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_K_0_CACC_BASE_ATOMIC_K_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_K_0_CACC_BASE_ATOMIC_K_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_BASE_ATOMIC_K_0_CACC_BASE_ATOMIC_K_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_BASE_CDMA_ID_0
#define NVDLA_CFGROM_CFGROM_CACC_BASE_CDMA_ID_0			_MK_ADDR_CONST(0x108)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_CDMA_ID_0_CACC_BASE_CDMA_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_BASE_CDMA_ID_0_CACC_BASE_CDMA_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_BASE_CDMA_ID_0_CACC_BASE_CDMA_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CACC_MULTI_BATCH_MAX_0
#define NVDLA_CFGROM_CFGROM_CACC_MULTI_BATCH_MAX_0			_MK_ADDR_CONST(0x10c)
#define NVDLA_CFGROM_CFGROM_CACC_MULTI_BATCH_MAX_0_CACC_MULTI_BATCH_MAX_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CACC_MULTI_BATCH_MAX_0_CACC_MULTI_BATCH_MAX_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CACC_MULTI_BATCH_MAX_0_CACC_MULTI_BATCH_MAX_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_RDMA_DESC_0
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_DESC_0			_MK_ADDR_CONST(0x110)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_DESC_0_SDP_RDMA_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_DESC_0_SDP_RDMA_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_RDMA_DESC_0_SDP_RDMA_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x114)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_INCOMPAT_0_SDP_RDMA_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_INCOMPAT_0_SDP_RDMA_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_INCOMPAT_0_SDP_RDMA_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_COMPAT_0			_MK_ADDR_CONST(0x118)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_COMPAT_0_SDP_RDMA_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_COMPAT_0_SDP_RDMA_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_RDMA_CAP_COMPAT_0_SDP_RDMA_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_ATOMIC_M_0
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_ATOMIC_M_0			_MK_ADDR_CONST(0x11c)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_ATOMIC_M_0_SDP_RDMA_BASE_ATOMIC_M_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_ATOMIC_M_0_SDP_RDMA_BASE_ATOMIC_M_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_ATOMIC_M_0_SDP_RDMA_BASE_ATOMIC_M_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_SDP_ID_0
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_SDP_ID_0			_MK_ADDR_CONST(0x120)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_SDP_ID_0_SDP_RDMA_BASE_SDP_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_SDP_ID_0_SDP_RDMA_BASE_SDP_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_RDMA_BASE_SDP_ID_0_SDP_RDMA_BASE_SDP_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_DESC_0
#define NVDLA_CFGROM_CFGROM_SDP_DESC_0			_MK_ADDR_CONST(0x124)
#define NVDLA_CFGROM_CFGROM_SDP_DESC_0_SDP_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_DESC_0_SDP_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_DESC_0_SDP_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_SDP_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x128)
#define NVDLA_CFGROM_CFGROM_SDP_CAP_INCOMPAT_0_SDP_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_CAP_INCOMPAT_0_SDP_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_CAP_INCOMPAT_0_SDP_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_SDP_CAP_COMPAT_0			_MK_ADDR_CONST(0x12c)
#define NVDLA_CFGROM_CFGROM_SDP_CAP_COMPAT_0_SDP_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_CAP_COMPAT_0_SDP_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_CAP_COMPAT_0_SDP_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_SDP_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0x130)
#define NVDLA_CFGROM_CFGROM_SDP_BASE_FEATURE_TYPES_0_SDP_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_BASE_FEATURE_TYPES_0_SDP_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_SDP_BASE_FEATURE_TYPES_0_SDP_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_BASE_WEIGHT_TYPES_0
#define NVDLA_CFGROM_CFGROM_SDP_BASE_WEIGHT_TYPES_0			_MK_ADDR_CONST(0x134)
#define NVDLA_CFGROM_CFGROM_SDP_BASE_WEIGHT_TYPES_0_SDP_BASE_WEIGHT_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_BASE_WEIGHT_TYPES_0_SDP_BASE_WEIGHT_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_SDP_BASE_WEIGHT_TYPES_0_SDP_BASE_WEIGHT_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_BASE_CDMA_ID_0
#define NVDLA_CFGROM_CFGROM_SDP_BASE_CDMA_ID_0			_MK_ADDR_CONST(0x138)
#define NVDLA_CFGROM_CFGROM_SDP_BASE_CDMA_ID_0_SDP_BASE_CDMA_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_BASE_CDMA_ID_0_SDP_BASE_CDMA_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_BASE_CDMA_ID_0_SDP_BASE_CDMA_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_MULTI_BATCH_MAX_0
#define NVDLA_CFGROM_CFGROM_SDP_MULTI_BATCH_MAX_0			_MK_ADDR_CONST(0x13c)
#define NVDLA_CFGROM_CFGROM_SDP_MULTI_BATCH_MAX_0_SDP_MULTI_BATCH_MAX_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_MULTI_BATCH_MAX_0_SDP_MULTI_BATCH_MAX_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_MULTI_BATCH_MAX_0_SDP_MULTI_BATCH_MAX_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_BS_THROUGHPUT_0
#define NVDLA_CFGROM_CFGROM_SDP_BS_THROUGHPUT_0			_MK_ADDR_CONST(0x140)
#define NVDLA_CFGROM_CFGROM_SDP_BS_THROUGHPUT_0_SDP_BS_THROUGHPUT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_BS_THROUGHPUT_0_SDP_BS_THROUGHPUT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_BS_THROUGHPUT_0_SDP_BS_THROUGHPUT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_BN_THROUGHPUT_0
#define NVDLA_CFGROM_CFGROM_SDP_BN_THROUGHPUT_0			_MK_ADDR_CONST(0x144)
#define NVDLA_CFGROM_CFGROM_SDP_BN_THROUGHPUT_0_SDP_BN_THROUGHPUT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_BN_THROUGHPUT_0_SDP_BN_THROUGHPUT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_BN_THROUGHPUT_0_SDP_BN_THROUGHPUT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_SDP_EW_THROUGHPUT_0
#define NVDLA_CFGROM_CFGROM_SDP_EW_THROUGHPUT_0			_MK_ADDR_CONST(0x148)
#define NVDLA_CFGROM_CFGROM_SDP_EW_THROUGHPUT_0_SDP_EW_THROUGHPUT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_SDP_EW_THROUGHPUT_0_SDP_EW_THROUGHPUT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_SDP_EW_THROUGHPUT_0_SDP_EW_THROUGHPUT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_RDMA_DESC_0
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_DESC_0			_MK_ADDR_CONST(0x14c)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_DESC_0_PDP_RDMA_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_DESC_0_PDP_RDMA_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_RDMA_DESC_0_PDP_RDMA_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x150)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_INCOMPAT_0_PDP_RDMA_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_INCOMPAT_0_PDP_RDMA_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_INCOMPAT_0_PDP_RDMA_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_COMPAT_0			_MK_ADDR_CONST(0x154)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_COMPAT_0_PDP_RDMA_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_COMPAT_0_PDP_RDMA_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_RDMA_CAP_COMPAT_0_PDP_RDMA_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_ATOMIC_M_0
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_ATOMIC_M_0			_MK_ADDR_CONST(0x158)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_ATOMIC_M_0_PDP_RDMA_BASE_ATOMIC_M_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_ATOMIC_M_0_PDP_RDMA_BASE_ATOMIC_M_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_ATOMIC_M_0_PDP_RDMA_BASE_ATOMIC_M_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_PDP_ID_0
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_PDP_ID_0			_MK_ADDR_CONST(0x15c)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_PDP_ID_0_PDP_RDMA_BASE_PDP_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_PDP_ID_0_PDP_RDMA_BASE_PDP_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_RDMA_BASE_PDP_ID_0_PDP_RDMA_BASE_PDP_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_DESC_0
#define NVDLA_CFGROM_CFGROM_PDP_DESC_0			_MK_ADDR_CONST(0x160)
#define NVDLA_CFGROM_CFGROM_PDP_DESC_0_PDP_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_DESC_0_PDP_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_DESC_0_PDP_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_PDP_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x164)
#define NVDLA_CFGROM_CFGROM_PDP_CAP_INCOMPAT_0_PDP_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_CAP_INCOMPAT_0_PDP_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_CAP_INCOMPAT_0_PDP_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_PDP_CAP_COMPAT_0			_MK_ADDR_CONST(0x168)
#define NVDLA_CFGROM_CFGROM_PDP_CAP_COMPAT_0_PDP_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_CAP_COMPAT_0_PDP_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_CAP_COMPAT_0_PDP_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_PDP_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0x16c)
#define NVDLA_CFGROM_CFGROM_PDP_BASE_FEATURE_TYPES_0_PDP_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_BASE_FEATURE_TYPES_0_PDP_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_PDP_BASE_FEATURE_TYPES_0_PDP_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_PDP_BASE_THROUGHPUT_0
#define NVDLA_CFGROM_CFGROM_PDP_BASE_THROUGHPUT_0			_MK_ADDR_CONST(0x170)
#define NVDLA_CFGROM_CFGROM_PDP_BASE_THROUGHPUT_0_PDP_BASE_THROUGHPUT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_PDP_BASE_THROUGHPUT_0_PDP_BASE_THROUGHPUT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_PDP_BASE_THROUGHPUT_0_PDP_BASE_THROUGHPUT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_RDMA_DESC_0
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_DESC_0			_MK_ADDR_CONST(0x174)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_DESC_0_CDP_RDMA_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_DESC_0_CDP_RDMA_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_RDMA_DESC_0_CDP_RDMA_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x178)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_INCOMPAT_0_CDP_RDMA_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_INCOMPAT_0_CDP_RDMA_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_INCOMPAT_0_CDP_RDMA_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_COMPAT_0			_MK_ADDR_CONST(0x17c)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_COMPAT_0_CDP_RDMA_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_COMPAT_0_CDP_RDMA_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_RDMA_CAP_COMPAT_0_CDP_RDMA_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_ATOMIC_M_0
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_ATOMIC_M_0			_MK_ADDR_CONST(0x180)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_ATOMIC_M_0_CDP_RDMA_BASE_ATOMIC_M_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_ATOMIC_M_0_CDP_RDMA_BASE_ATOMIC_M_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_ATOMIC_M_0_CDP_RDMA_BASE_ATOMIC_M_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_CDP_ID_0
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_CDP_ID_0			_MK_ADDR_CONST(0x184)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_CDP_ID_0_CDP_RDMA_BASE_CDP_ID_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_CDP_ID_0_CDP_RDMA_BASE_CDP_ID_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_RDMA_BASE_CDP_ID_0_CDP_RDMA_BASE_CDP_ID_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_DESC_0
#define NVDLA_CFGROM_CFGROM_CDP_DESC_0			_MK_ADDR_CONST(0x188)
#define NVDLA_CFGROM_CFGROM_CDP_DESC_0_CDP_DESC_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_DESC_0_CDP_DESC_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_DESC_0_CDP_DESC_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_CAP_INCOMPAT_0
#define NVDLA_CFGROM_CFGROM_CDP_CAP_INCOMPAT_0			_MK_ADDR_CONST(0x18c)
#define NVDLA_CFGROM_CFGROM_CDP_CAP_INCOMPAT_0_CDP_CAP_INCOMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_CAP_INCOMPAT_0_CDP_CAP_INCOMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_CAP_INCOMPAT_0_CDP_CAP_INCOMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_CAP_COMPAT_0
#define NVDLA_CFGROM_CFGROM_CDP_CAP_COMPAT_0			_MK_ADDR_CONST(0x190)
#define NVDLA_CFGROM_CFGROM_CDP_CAP_COMPAT_0_CDP_CAP_COMPAT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_CAP_COMPAT_0_CDP_CAP_COMPAT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_CAP_COMPAT_0_CDP_CAP_COMPAT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_BASE_FEATURE_TYPES_0
#define NVDLA_CFGROM_CFGROM_CDP_BASE_FEATURE_TYPES_0			_MK_ADDR_CONST(0x194)
#define NVDLA_CFGROM_CFGROM_CDP_BASE_FEATURE_TYPES_0_CDP_BASE_FEATURE_TYPES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_BASE_FEATURE_TYPES_0_CDP_BASE_FEATURE_TYPES_FIELD			_MK_FIELD_CONST(0xfff, NVDLA_CFGROM_CFGROM_CDP_BASE_FEATURE_TYPES_0_CDP_BASE_FEATURE_TYPES_SHIFT)


// Register NVDLA_CFGROM_CFGROM_CDP_BASE_THROUGHPUT_0
#define NVDLA_CFGROM_CFGROM_CDP_BASE_THROUGHPUT_0			_MK_ADDR_CONST(0x198)
#define NVDLA_CFGROM_CFGROM_CDP_BASE_THROUGHPUT_0_CDP_BASE_THROUGHPUT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_CDP_BASE_THROUGHPUT_0_CDP_BASE_THROUGHPUT_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_CDP_BASE_THROUGHPUT_0_CDP_BASE_THROUGHPUT_SHIFT)


// Register NVDLA_CFGROM_CFGROM_END_OF_LIST_0
#define NVDLA_CFGROM_CFGROM_END_OF_LIST_0			_MK_ADDR_CONST(0x19c)
#define NVDLA_CFGROM_CFGROM_END_OF_LIST_0_END_OF_LIST_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CFGROM_CFGROM_END_OF_LIST_0_END_OF_LIST_FIELD			_MK_FIELD_CONST(0xffffffff, NVDLA_CFGROM_CFGROM_END_OF_LIST_0_END_OF_LIST_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register GLB_S_NVDLA_HW_VERSION_0
#define GLB_S_NVDLA_HW_VERSION_0			_MK_ADDR_CONST(0x1000)
#define GLB_S_NVDLA_HW_VERSION_0_MAJOR_SHIFT			_MK_SHIFT_CONST(0)
#define GLB_S_NVDLA_HW_VERSION_0_MAJOR_FIELD			_MK_FIELD_CONST(0xff, GLB_S_NVDLA_HW_VERSION_0_MAJOR_SHIFT)
#define GLB_S_NVDLA_HW_VERSION_0_MINOR_SHIFT			_MK_SHIFT_CONST(8)
#define GLB_S_NVDLA_HW_VERSION_0_MINOR_FIELD			_MK_FIELD_CONST(0xffff, GLB_S_NVDLA_HW_VERSION_0_MINOR_SHIFT)


// Register GLB_S_INTR_MASK_0
#define GLB_S_INTR_MASK_0			_MK_ADDR_CONST(0x1004)
#define GLB_S_INTR_MASK_0_SDP_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(0)
#define GLB_S_INTR_MASK_0_SDP_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_SDP_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_SDP_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(1)
#define GLB_S_INTR_MASK_0_SDP_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_SDP_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_CDP_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(2)
#define GLB_S_INTR_MASK_0_CDP_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CDP_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_CDP_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(3)
#define GLB_S_INTR_MASK_0_CDP_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CDP_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_PDP_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(4)
#define GLB_S_INTR_MASK_0_PDP_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_PDP_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_PDP_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(5)
#define GLB_S_INTR_MASK_0_PDP_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_PDP_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_BDMA_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(6)
#define GLB_S_INTR_MASK_0_BDMA_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_BDMA_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_BDMA_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(7)
#define GLB_S_INTR_MASK_0_BDMA_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_BDMA_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_RUBIK_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(8)
#define GLB_S_INTR_MASK_0_RUBIK_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_RUBIK_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_RUBIK_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(9)
#define GLB_S_INTR_MASK_0_RUBIK_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_RUBIK_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_CDMA_DAT_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(16)
#define GLB_S_INTR_MASK_0_CDMA_DAT_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CDMA_DAT_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_CDMA_DAT_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(17)
#define GLB_S_INTR_MASK_0_CDMA_DAT_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CDMA_DAT_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_CDMA_WT_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(18)
#define GLB_S_INTR_MASK_0_CDMA_WT_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CDMA_WT_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_CDMA_WT_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(19)
#define GLB_S_INTR_MASK_0_CDMA_WT_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CDMA_WT_DONE_MASK1_SHIFT)
#define GLB_S_INTR_MASK_0_CACC_DONE_MASK0_SHIFT			_MK_SHIFT_CONST(20)
#define GLB_S_INTR_MASK_0_CACC_DONE_MASK0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CACC_DONE_MASK0_SHIFT)
#define GLB_S_INTR_MASK_0_CACC_DONE_MASK1_SHIFT			_MK_SHIFT_CONST(21)
#define GLB_S_INTR_MASK_0_CACC_DONE_MASK1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_MASK_0_CACC_DONE_MASK1_SHIFT)


// Register GLB_S_INTR_SET_0
#define GLB_S_INTR_SET_0			_MK_ADDR_CONST(0x1008)
#define GLB_S_INTR_SET_0_SDP_DONE_SET0_SHIFT			_MK_SHIFT_CONST(0)
#define GLB_S_INTR_SET_0_SDP_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_SDP_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_SDP_DONE_SET1_SHIFT			_MK_SHIFT_CONST(1)
#define GLB_S_INTR_SET_0_SDP_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_SDP_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_CDP_DONE_SET0_SHIFT			_MK_SHIFT_CONST(2)
#define GLB_S_INTR_SET_0_CDP_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CDP_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_CDP_DONE_SET1_SHIFT			_MK_SHIFT_CONST(3)
#define GLB_S_INTR_SET_0_CDP_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CDP_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_PDP_DONE_SET0_SHIFT			_MK_SHIFT_CONST(4)
#define GLB_S_INTR_SET_0_PDP_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_PDP_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_PDP_DONE_SET1_SHIFT			_MK_SHIFT_CONST(5)
#define GLB_S_INTR_SET_0_PDP_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_PDP_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_BDMA_DONE_SET0_SHIFT			_MK_SHIFT_CONST(6)
#define GLB_S_INTR_SET_0_BDMA_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_BDMA_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_BDMA_DONE_SET1_SHIFT			_MK_SHIFT_CONST(7)
#define GLB_S_INTR_SET_0_BDMA_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_BDMA_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_RUBIK_DONE_SET0_SHIFT			_MK_SHIFT_CONST(8)
#define GLB_S_INTR_SET_0_RUBIK_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_RUBIK_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_RUBIK_DONE_SET1_SHIFT			_MK_SHIFT_CONST(9)
#define GLB_S_INTR_SET_0_RUBIK_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_RUBIK_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_CDMA_DAT_DONE_SET0_SHIFT			_MK_SHIFT_CONST(16)
#define GLB_S_INTR_SET_0_CDMA_DAT_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CDMA_DAT_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_CDMA_DAT_DONE_SET1_SHIFT			_MK_SHIFT_CONST(17)
#define GLB_S_INTR_SET_0_CDMA_DAT_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CDMA_DAT_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_CDMA_WT_DONE_SET0_SHIFT			_MK_SHIFT_CONST(18)
#define GLB_S_INTR_SET_0_CDMA_WT_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CDMA_WT_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_CDMA_WT_DONE_SET1_SHIFT			_MK_SHIFT_CONST(19)
#define GLB_S_INTR_SET_0_CDMA_WT_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CDMA_WT_DONE_SET1_SHIFT)
#define GLB_S_INTR_SET_0_CACC_DONE_SET0_SHIFT			_MK_SHIFT_CONST(20)
#define GLB_S_INTR_SET_0_CACC_DONE_SET0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CACC_DONE_SET0_SHIFT)
#define GLB_S_INTR_SET_0_CACC_DONE_SET1_SHIFT			_MK_SHIFT_CONST(21)
#define GLB_S_INTR_SET_0_CACC_DONE_SET1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_SET_0_CACC_DONE_SET1_SHIFT)


// Register GLB_S_INTR_STATUS_0
#define GLB_S_INTR_STATUS_0			_MK_ADDR_CONST(0x100c)
#define GLB_S_INTR_STATUS_0_SDP_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(0)
#define GLB_S_INTR_STATUS_0_SDP_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_SDP_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_SDP_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(1)
#define GLB_S_INTR_STATUS_0_SDP_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_SDP_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_CDP_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(2)
#define GLB_S_INTR_STATUS_0_CDP_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CDP_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_CDP_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(3)
#define GLB_S_INTR_STATUS_0_CDP_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CDP_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_PDP_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(4)
#define GLB_S_INTR_STATUS_0_PDP_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_PDP_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_PDP_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(5)
#define GLB_S_INTR_STATUS_0_PDP_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_PDP_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_BDMA_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(6)
#define GLB_S_INTR_STATUS_0_BDMA_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_BDMA_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_BDMA_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(7)
#define GLB_S_INTR_STATUS_0_BDMA_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_BDMA_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_RUBIK_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(8)
#define GLB_S_INTR_STATUS_0_RUBIK_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_RUBIK_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_RUBIK_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(9)
#define GLB_S_INTR_STATUS_0_RUBIK_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_RUBIK_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_CDMA_DAT_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(16)
#define GLB_S_INTR_STATUS_0_CDMA_DAT_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CDMA_DAT_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_CDMA_DAT_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(17)
#define GLB_S_INTR_STATUS_0_CDMA_DAT_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CDMA_DAT_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_CDMA_WT_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(18)
#define GLB_S_INTR_STATUS_0_CDMA_WT_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CDMA_WT_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_CDMA_WT_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(19)
#define GLB_S_INTR_STATUS_0_CDMA_WT_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CDMA_WT_DONE_STATUS1_SHIFT)
#define GLB_S_INTR_STATUS_0_CACC_DONE_STATUS0_SHIFT			_MK_SHIFT_CONST(20)
#define GLB_S_INTR_STATUS_0_CACC_DONE_STATUS0_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CACC_DONE_STATUS0_SHIFT)
#define GLB_S_INTR_STATUS_0_CACC_DONE_STATUS1_SHIFT			_MK_SHIFT_CONST(21)
#define GLB_S_INTR_STATUS_0_CACC_DONE_STATUS1_FIELD			_MK_FIELD_CONST(0x1, GLB_S_INTR_STATUS_0_CACC_DONE_STATUS1_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register NVDLA_MCIF_CFG_RD_WEIGHT_0_0
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0			_MK_ADDR_CONST(0x2000)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_BDMA_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_BDMA_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_BDMA_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_SDP_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_SDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_SDP_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_PDP_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_PDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_PDP_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_CDP_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_CDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_CDP_SHIFT)


// Register NVDLA_MCIF_CFG_RD_WEIGHT_1_0
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0			_MK_ADDR_CONST(0x2004)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_B_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_B_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_B_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_N_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_N_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_N_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_E_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_E_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_E_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_CDMA_DAT_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_CDMA_DAT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_CDMA_DAT_SHIFT)


// Register NVDLA_MCIF_CFG_RD_WEIGHT_2_0
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0			_MK_ADDR_CONST(0x2008)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_CDMA_WT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_CDMA_WT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_CDMA_WT_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RBK_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RBK_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RBK_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_1_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_1_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_1_SHIFT)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_0_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_0_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_0_SHIFT)


// Register NVDLA_MCIF_CFG_WR_WEIGHT_0_0
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0			_MK_ADDR_CONST(0x200c)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_BDMA_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_BDMA_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_BDMA_SHIFT)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_SDP_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_SDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_SDP_SHIFT)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_PDP_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_PDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_PDP_SHIFT)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_CDP_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_CDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_CDP_SHIFT)


// Register NVDLA_MCIF_CFG_WR_WEIGHT_1_0
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0			_MK_ADDR_CONST(0x2010)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RBK_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RBK_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RBK_SHIFT)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_2_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_2_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_2_SHIFT)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_1_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_1_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_1_SHIFT)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_0_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_0_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_0_SHIFT)


// Register NVDLA_MCIF_CFG_OUTSTANDING_CNT_0
#define NVDLA_MCIF_CFG_OUTSTANDING_CNT_0			_MK_ADDR_CONST(0x2014)
#define NVDLA_MCIF_CFG_OUTSTANDING_CNT_0_RD_OS_CNT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_MCIF_CFG_OUTSTANDING_CNT_0_RD_OS_CNT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_OUTSTANDING_CNT_0_RD_OS_CNT_SHIFT)
#define NVDLA_MCIF_CFG_OUTSTANDING_CNT_0_WR_OS_CNT_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_CFG_OUTSTANDING_CNT_0_WR_OS_CNT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_MCIF_CFG_OUTSTANDING_CNT_0_WR_OS_CNT_SHIFT)


// Register NVDLA_MCIF_STATUS_0
#define NVDLA_MCIF_STATUS_0			_MK_ADDR_CONST(0x2018)
#define NVDLA_MCIF_STATUS_0_IDLE_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_MCIF_STATUS_0_IDLE_FIELD			_MK_FIELD_CONST(0x1, NVDLA_MCIF_STATUS_0_IDLE_SHIFT)
#define NVDLA_MCIF_STATUS_0_IDLE_NO			_MK_ENUM_CONST(0x0)
#define NVDLA_MCIF_STATUS_0_IDLE_YES			_MK_ENUM_CONST(0x1)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CDMA_S_STATUS_0
#define CDMA_S_STATUS_0			_MK_ADDR_CONST(0x3000)
#define CDMA_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CDMA_S_STATUS_0_STATUS_0_SHIFT)
#define CDMA_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CDMA_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CDMA_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CDMA_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CDMA_S_STATUS_0_STATUS_1_SHIFT)
#define CDMA_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CDMA_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CDMA_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CDMA_S_POINTER_0
#define CDMA_S_POINTER_0			_MK_ADDR_CONST(0x3004)
#define CDMA_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CDMA_S_POINTER_0_PRODUCER_SHIFT)
#define CDMA_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CDMA_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CDMA_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CDMA_S_POINTER_0_CONSUMER_SHIFT)
#define CDMA_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CDMA_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CDMA_S_ARBITER_0
#define CDMA_S_ARBITER_0			_MK_ADDR_CONST(0x3008)
#define CDMA_S_ARBITER_0_ARB_WEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_S_ARBITER_0_ARB_WEIGHT_FIELD			_MK_FIELD_CONST(0xf, CDMA_S_ARBITER_0_ARB_WEIGHT_SHIFT)
#define CDMA_S_ARBITER_0_ARB_WMB_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_S_ARBITER_0_ARB_WMB_FIELD			_MK_FIELD_CONST(0xf, CDMA_S_ARBITER_0_ARB_WMB_SHIFT)


// Register CDMA_S_CBUF_FLUSH_STATUS_0
#define CDMA_S_CBUF_FLUSH_STATUS_0			_MK_ADDR_CONST(0x300c)
#define CDMA_S_CBUF_FLUSH_STATUS_0_FLUSH_DONE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_S_CBUF_FLUSH_STATUS_0_FLUSH_DONE_FIELD			_MK_FIELD_CONST(0x1, CDMA_S_CBUF_FLUSH_STATUS_0_FLUSH_DONE_SHIFT)


// Register CDMA_D_OP_ENABLE_0
#define CDMA_D_OP_ENABLE_0			_MK_ADDR_CONST(0x3010)
#define CDMA_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CDMA_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDMA_D_MISC_CFG_0
#define CDMA_D_MISC_CFG_0			_MK_ADDR_CONST(0x3014)
#define CDMA_D_MISC_CFG_0_CONV_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_MISC_CFG_0_CONV_MODE_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_MISC_CFG_0_CONV_MODE_SHIFT)
#define CDMA_D_MISC_CFG_0_CONV_MODE_DIRECT			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_CONV_MODE_WINOGRAD			_MK_ENUM_CONST(0x1)
#define CDMA_D_MISC_CFG_0_IN_PRECISION_SHIFT			_MK_SHIFT_CONST(8)
#define CDMA_D_MISC_CFG_0_IN_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CDMA_D_MISC_CFG_0_IN_PRECISION_SHIFT)
#define CDMA_D_MISC_CFG_0_IN_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_IN_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CDMA_D_MISC_CFG_0_IN_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define CDMA_D_MISC_CFG_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(12)
#define CDMA_D_MISC_CFG_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CDMA_D_MISC_CFG_0_PROC_PRECISION_SHIFT)
#define CDMA_D_MISC_CFG_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CDMA_D_MISC_CFG_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define CDMA_D_MISC_CFG_0_DATA_REUSE_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_MISC_CFG_0_DATA_REUSE_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_MISC_CFG_0_DATA_REUSE_SHIFT)
#define CDMA_D_MISC_CFG_0_DATA_REUSE_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_DATA_REUSE_ENABLE			_MK_ENUM_CONST(0x1)
#define CDMA_D_MISC_CFG_0_WEIGHT_REUSE_SHIFT			_MK_SHIFT_CONST(20)
#define CDMA_D_MISC_CFG_0_WEIGHT_REUSE_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_MISC_CFG_0_WEIGHT_REUSE_SHIFT)
#define CDMA_D_MISC_CFG_0_WEIGHT_REUSE_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_WEIGHT_REUSE_ENABLE			_MK_ENUM_CONST(0x1)
#define CDMA_D_MISC_CFG_0_SKIP_DATA_RLS_SHIFT			_MK_SHIFT_CONST(24)
#define CDMA_D_MISC_CFG_0_SKIP_DATA_RLS_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_MISC_CFG_0_SKIP_DATA_RLS_SHIFT)
#define CDMA_D_MISC_CFG_0_SKIP_DATA_RLS_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_SKIP_DATA_RLS_ENABLE			_MK_ENUM_CONST(0x1)
#define CDMA_D_MISC_CFG_0_SKIP_WEIGHT_RLS_SHIFT			_MK_SHIFT_CONST(28)
#define CDMA_D_MISC_CFG_0_SKIP_WEIGHT_RLS_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_MISC_CFG_0_SKIP_WEIGHT_RLS_SHIFT)
#define CDMA_D_MISC_CFG_0_SKIP_WEIGHT_RLS_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_MISC_CFG_0_SKIP_WEIGHT_RLS_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDMA_D_DATAIN_FORMAT_0
#define CDMA_D_DATAIN_FORMAT_0			_MK_ADDR_CONST(0x3018)
#define CDMA_D_DATAIN_FORMAT_0_DATAIN_FORMAT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DATAIN_FORMAT_0_DATAIN_FORMAT_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_DATAIN_FORMAT_0_DATAIN_FORMAT_SHIFT)
#define CDMA_D_DATAIN_FORMAT_0_DATAIN_FORMAT_FEATURE			_MK_ENUM_CONST(0x0)
#define CDMA_D_DATAIN_FORMAT_0_DATAIN_FORMAT_PIXEL			_MK_ENUM_CONST(0x1)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_SHIFT			_MK_SHIFT_CONST(8)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_FIELD			_MK_FIELD_CONST(0x3f, CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_SHIFT)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R8			_MK_ENUM_CONST(0x0)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R10			_MK_ENUM_CONST(0x1)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R12			_MK_ENUM_CONST(0x2)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R16			_MK_ENUM_CONST(0x3)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R16_I			_MK_ENUM_CONST(0x4)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R16_F			_MK_ENUM_CONST(0x5)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A16B16G16R16			_MK_ENUM_CONST(0x6)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_X16B16G16R16			_MK_ENUM_CONST(0x7)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A16B16G16R16_F			_MK_ENUM_CONST(0x8)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A16Y16U16V16			_MK_ENUM_CONST(0x9)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_V16U16Y16A16			_MK_ENUM_CONST(0xa)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A16Y16U16V16_F			_MK_ENUM_CONST(0xb)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A8B8G8R8			_MK_ENUM_CONST(0xc)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A8R8G8B8			_MK_ENUM_CONST(0xd)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_B8G8R8A8			_MK_ENUM_CONST(0xe)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R8G8B8A8			_MK_ENUM_CONST(0xf)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_X8B8G8R8			_MK_ENUM_CONST(0x10)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_X8R8G8B8			_MK_ENUM_CONST(0x11)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_B8G8R8X8			_MK_ENUM_CONST(0x12)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R8G8B8X8			_MK_ENUM_CONST(0x13)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A2B10G10R10			_MK_ENUM_CONST(0x14)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A2R10G10B10			_MK_ENUM_CONST(0x15)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_B10G10R10A2			_MK_ENUM_CONST(0x16)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_R10G10B10A2			_MK_ENUM_CONST(0x17)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A2Y10U10V10			_MK_ENUM_CONST(0x18)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_V10U10Y10A2			_MK_ENUM_CONST(0x19)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_A8Y8U8V8			_MK_ENUM_CONST(0x1a)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_V8U8Y8A8			_MK_ENUM_CONST(0x1b)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y8___U8V8_N444			_MK_ENUM_CONST(0x1c)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y8___V8U8_N444			_MK_ENUM_CONST(0x1d)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y10___U10V10_N444			_MK_ENUM_CONST(0x1e)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y10___V10U10_N444			_MK_ENUM_CONST(0x1f)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y12___U12V12_N444			_MK_ENUM_CONST(0x20)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y12___V12U12_N444			_MK_ENUM_CONST(0x21)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y16___U16V16_N444			_MK_ENUM_CONST(0x22)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_FORMAT_T_Y16___V16U16_N444			_MK_ENUM_CONST(0x23)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_MAPPING_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_MAPPING_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_DATAIN_FORMAT_0_PIXEL_MAPPING_SHIFT)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_MAPPING_PITCH_LINEAR			_MK_ENUM_CONST(0x0)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_MAPPING_RESERVED_LINEAR			_MK_ENUM_CONST(0x1)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_SIGN_OVERRIDE_SHIFT			_MK_SHIFT_CONST(20)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_SIGN_OVERRIDE_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_DATAIN_FORMAT_0_PIXEL_SIGN_OVERRIDE_SHIFT)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_SIGN_OVERRIDE_UNSIGNED_INT			_MK_ENUM_CONST(0x0)
#define CDMA_D_DATAIN_FORMAT_0_PIXEL_SIGN_OVERRIDE_SIGNED_INT			_MK_ENUM_CONST(0x1)


// Register CDMA_D_DATAIN_SIZE_0_0
#define CDMA_D_DATAIN_SIZE_0_0			_MK_ADDR_CONST(0x301c)
#define CDMA_D_DATAIN_SIZE_0_0_DATAIN_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DATAIN_SIZE_0_0_DATAIN_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, CDMA_D_DATAIN_SIZE_0_0_DATAIN_WIDTH_SHIFT)
#define CDMA_D_DATAIN_SIZE_0_0_DATAIN_HEIGHT_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_DATAIN_SIZE_0_0_DATAIN_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, CDMA_D_DATAIN_SIZE_0_0_DATAIN_HEIGHT_SHIFT)


// Register CDMA_D_DATAIN_SIZE_1_0
#define CDMA_D_DATAIN_SIZE_1_0			_MK_ADDR_CONST(0x3020)
#define CDMA_D_DATAIN_SIZE_1_0_DATAIN_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DATAIN_SIZE_1_0_DATAIN_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, CDMA_D_DATAIN_SIZE_1_0_DATAIN_CHANNEL_SHIFT)


// Register CDMA_D_DATAIN_SIZE_EXT_0_0
#define CDMA_D_DATAIN_SIZE_EXT_0_0			_MK_ADDR_CONST(0x3024)
#define CDMA_D_DATAIN_SIZE_EXT_0_0_DATAIN_WIDTH_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DATAIN_SIZE_EXT_0_0_DATAIN_WIDTH_EXT_FIELD			_MK_FIELD_CONST(0x1fff, CDMA_D_DATAIN_SIZE_EXT_0_0_DATAIN_WIDTH_EXT_SHIFT)
#define CDMA_D_DATAIN_SIZE_EXT_0_0_DATAIN_HEIGHT_EXT_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_DATAIN_SIZE_EXT_0_0_DATAIN_HEIGHT_EXT_FIELD			_MK_FIELD_CONST(0x1fff, CDMA_D_DATAIN_SIZE_EXT_0_0_DATAIN_HEIGHT_EXT_SHIFT)


// Register CDMA_D_PIXEL_OFFSET_0
#define CDMA_D_PIXEL_OFFSET_0			_MK_ADDR_CONST(0x3028)
#define CDMA_D_PIXEL_OFFSET_0_PIXEL_X_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_PIXEL_OFFSET_0_PIXEL_X_OFFSET_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_PIXEL_OFFSET_0_PIXEL_X_OFFSET_SHIFT)
#define CDMA_D_PIXEL_OFFSET_0_PIXEL_Y_OFFSET_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_PIXEL_OFFSET_0_PIXEL_Y_OFFSET_FIELD			_MK_FIELD_CONST(0x7, CDMA_D_PIXEL_OFFSET_0_PIXEL_Y_OFFSET_SHIFT)


// Register CDMA_D_DAIN_RAM_TYPE_0
#define CDMA_D_DAIN_RAM_TYPE_0			_MK_ADDR_CONST(0x302c)
#define CDMA_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_SHIFT)
#define CDMA_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_CVIF			_MK_ENUM_CONST(0x0)
#define CDMA_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_MCIF			_MK_ENUM_CONST(0x1)


// Register CDMA_D_DAIN_ADDR_HIGH_0_0
#define CDMA_D_DAIN_ADDR_HIGH_0_0			_MK_ADDR_CONST(0x3030)
#define CDMA_D_DAIN_ADDR_HIGH_0_0_DATAIN_ADDR_HIGH_0_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DAIN_ADDR_HIGH_0_0_DATAIN_ADDR_HIGH_0_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_DAIN_ADDR_HIGH_0_0_DATAIN_ADDR_HIGH_0_SHIFT)


// Register CDMA_D_DAIN_ADDR_LOW_0_0
#define CDMA_D_DAIN_ADDR_LOW_0_0			_MK_ADDR_CONST(0x3034)
#define CDMA_D_DAIN_ADDR_LOW_0_0_DATAIN_ADDR_LOW_0_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DAIN_ADDR_LOW_0_0_DATAIN_ADDR_LOW_0_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_DAIN_ADDR_LOW_0_0_DATAIN_ADDR_LOW_0_SHIFT)


// Register CDMA_D_DAIN_ADDR_HIGH_1_0
#define CDMA_D_DAIN_ADDR_HIGH_1_0			_MK_ADDR_CONST(0x3038)
#define CDMA_D_DAIN_ADDR_HIGH_1_0_DATAIN_ADDR_HIGH_1_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DAIN_ADDR_HIGH_1_0_DATAIN_ADDR_HIGH_1_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_DAIN_ADDR_HIGH_1_0_DATAIN_ADDR_HIGH_1_SHIFT)


// Register CDMA_D_DAIN_ADDR_LOW_1_0
#define CDMA_D_DAIN_ADDR_LOW_1_0			_MK_ADDR_CONST(0x303c)
#define CDMA_D_DAIN_ADDR_LOW_1_0_DATAIN_ADDR_LOW_1_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DAIN_ADDR_LOW_1_0_DATAIN_ADDR_LOW_1_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_DAIN_ADDR_LOW_1_0_DATAIN_ADDR_LOW_1_SHIFT)


// Register CDMA_D_LINE_STRIDE_0
#define CDMA_D_LINE_STRIDE_0			_MK_ADDR_CONST(0x3040)
#define CDMA_D_LINE_STRIDE_0_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_LINE_STRIDE_0_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_LINE_STRIDE_0_LINE_STRIDE_SHIFT)


// Register CDMA_D_LINE_UV_STRIDE_0
#define CDMA_D_LINE_UV_STRIDE_0			_MK_ADDR_CONST(0x3044)
#define CDMA_D_LINE_UV_STRIDE_0_UV_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_LINE_UV_STRIDE_0_UV_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_LINE_UV_STRIDE_0_UV_LINE_STRIDE_SHIFT)


// Register CDMA_D_SURF_STRIDE_0
#define CDMA_D_SURF_STRIDE_0			_MK_ADDR_CONST(0x3048)
#define CDMA_D_SURF_STRIDE_0_SURF_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_SURF_STRIDE_0_SURF_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_SURF_STRIDE_0_SURF_STRIDE_SHIFT)


// Register CDMA_D_DAIN_MAP_0
#define CDMA_D_DAIN_MAP_0			_MK_ADDR_CONST(0x304c)
#define CDMA_D_DAIN_MAP_0_LINE_PACKED_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_DAIN_MAP_0_LINE_PACKED_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_DAIN_MAP_0_LINE_PACKED_SHIFT)
#define CDMA_D_DAIN_MAP_0_LINE_PACKED_FALSE			_MK_ENUM_CONST(0x0)
#define CDMA_D_DAIN_MAP_0_LINE_PACKED_TRUE			_MK_ENUM_CONST(0x1)
#define CDMA_D_DAIN_MAP_0_SURF_PACKED_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_DAIN_MAP_0_SURF_PACKED_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_DAIN_MAP_0_SURF_PACKED_SHIFT)
#define CDMA_D_DAIN_MAP_0_SURF_PACKED_FALSE			_MK_ENUM_CONST(0x0)
#define CDMA_D_DAIN_MAP_0_SURF_PACKED_TRUE			_MK_ENUM_CONST(0x1)


// Register CDMA_D_RESERVED_X_CFG_0
#define CDMA_D_RESERVED_X_CFG_0			_MK_ADDR_CONST(0x3050)
#define CDMA_D_RESERVED_X_CFG_0_RSV_PER_LINE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_RESERVED_X_CFG_0_RSV_PER_LINE_FIELD			_MK_FIELD_CONST(0x3ff, CDMA_D_RESERVED_X_CFG_0_RSV_PER_LINE_SHIFT)
#define CDMA_D_RESERVED_X_CFG_0_RSV_PER_UV_LINE_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_RESERVED_X_CFG_0_RSV_PER_UV_LINE_FIELD			_MK_FIELD_CONST(0x3ff, CDMA_D_RESERVED_X_CFG_0_RSV_PER_UV_LINE_SHIFT)


// Register CDMA_D_RESERVED_Y_CFG_0
#define CDMA_D_RESERVED_Y_CFG_0			_MK_ADDR_CONST(0x3054)
#define CDMA_D_RESERVED_Y_CFG_0_RSV_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_RESERVED_Y_CFG_0_RSV_HEIGHT_FIELD			_MK_FIELD_CONST(0x7, CDMA_D_RESERVED_Y_CFG_0_RSV_HEIGHT_SHIFT)
#define CDMA_D_RESERVED_Y_CFG_0_RSV_Y_INDEX_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_RESERVED_Y_CFG_0_RSV_Y_INDEX_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_RESERVED_Y_CFG_0_RSV_Y_INDEX_SHIFT)


// Register CDMA_D_BATCH_NUMBER_0
#define CDMA_D_BATCH_NUMBER_0			_MK_ADDR_CONST(0x3058)
#define CDMA_D_BATCH_NUMBER_0_BATCHES_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_BATCH_NUMBER_0_BATCHES_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_BATCH_NUMBER_0_BATCHES_SHIFT)


// Register CDMA_D_BATCH_STRIDE_0
#define CDMA_D_BATCH_STRIDE_0			_MK_ADDR_CONST(0x305c)
#define CDMA_D_BATCH_STRIDE_0_BATCH_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_BATCH_STRIDE_0_BATCH_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_BATCH_STRIDE_0_BATCH_STRIDE_SHIFT)


// Register CDMA_D_ENTRY_PER_SLICE_0
#define CDMA_D_ENTRY_PER_SLICE_0			_MK_ADDR_CONST(0x3060)
#define CDMA_D_ENTRY_PER_SLICE_0_ENTRIES_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_ENTRY_PER_SLICE_0_ENTRIES_FIELD			_MK_FIELD_CONST(0x3fff, CDMA_D_ENTRY_PER_SLICE_0_ENTRIES_SHIFT)


// Register CDMA_D_FETCH_GRAIN_0
#define CDMA_D_FETCH_GRAIN_0			_MK_ADDR_CONST(0x3064)
#define CDMA_D_FETCH_GRAIN_0_GRAINS_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_FETCH_GRAIN_0_GRAINS_FIELD			_MK_FIELD_CONST(0xfff, CDMA_D_FETCH_GRAIN_0_GRAINS_SHIFT)


// Register CDMA_D_WEIGHT_FORMAT_0
#define CDMA_D_WEIGHT_FORMAT_0			_MK_ADDR_CONST(0x3068)
#define CDMA_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_SHIFT)
#define CDMA_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_UNCOMPRESSED			_MK_ENUM_CONST(0x0)
#define CDMA_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_COMPRESSED			_MK_ENUM_CONST(0x1)


// Register CDMA_D_WEIGHT_SIZE_0_0
#define CDMA_D_WEIGHT_SIZE_0_0			_MK_ADDR_CONST(0x306c)
#define CDMA_D_WEIGHT_SIZE_0_0_BYTE_PER_KERNEL_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_SIZE_0_0_BYTE_PER_KERNEL_FIELD			_MK_FIELD_CONST(0x3ffff, CDMA_D_WEIGHT_SIZE_0_0_BYTE_PER_KERNEL_SHIFT)


// Register CDMA_D_WEIGHT_SIZE_1_0
#define CDMA_D_WEIGHT_SIZE_1_0			_MK_ADDR_CONST(0x3070)
#define CDMA_D_WEIGHT_SIZE_1_0_WEIGHT_KERNEL_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_SIZE_1_0_WEIGHT_KERNEL_FIELD			_MK_FIELD_CONST(0x1fff, CDMA_D_WEIGHT_SIZE_1_0_WEIGHT_KERNEL_SHIFT)


// Register CDMA_D_WEIGHT_RAM_TYPE_0
#define CDMA_D_WEIGHT_RAM_TYPE_0			_MK_ADDR_CONST(0x3074)
#define CDMA_D_WEIGHT_RAM_TYPE_0_WEIGHT_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_RAM_TYPE_0_WEIGHT_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_WEIGHT_RAM_TYPE_0_WEIGHT_RAM_TYPE_SHIFT)
#define CDMA_D_WEIGHT_RAM_TYPE_0_WEIGHT_RAM_TYPE_CVIF			_MK_ENUM_CONST(0x0)
#define CDMA_D_WEIGHT_RAM_TYPE_0_WEIGHT_RAM_TYPE_MCIF			_MK_ENUM_CONST(0x1)


// Register CDMA_D_WEIGHT_ADDR_HIGH_0
#define CDMA_D_WEIGHT_ADDR_HIGH_0			_MK_ADDR_CONST(0x3078)
#define CDMA_D_WEIGHT_ADDR_HIGH_0_WEIGHT_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_ADDR_HIGH_0_WEIGHT_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WEIGHT_ADDR_HIGH_0_WEIGHT_ADDR_HIGH_SHIFT)


// Register CDMA_D_WEIGHT_ADDR_LOW_0
#define CDMA_D_WEIGHT_ADDR_LOW_0			_MK_ADDR_CONST(0x307c)
#define CDMA_D_WEIGHT_ADDR_LOW_0_WEIGHT_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_ADDR_LOW_0_WEIGHT_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WEIGHT_ADDR_LOW_0_WEIGHT_ADDR_LOW_SHIFT)


// Register CDMA_D_WEIGHT_BYTES_0
#define CDMA_D_WEIGHT_BYTES_0			_MK_ADDR_CONST(0x3080)
#define CDMA_D_WEIGHT_BYTES_0_WEIGHT_BYTES_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WEIGHT_BYTES_0_WEIGHT_BYTES_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WEIGHT_BYTES_0_WEIGHT_BYTES_SHIFT)


// Register CDMA_D_WGS_ADDR_HIGH_0
#define CDMA_D_WGS_ADDR_HIGH_0			_MK_ADDR_CONST(0x3084)
#define CDMA_D_WGS_ADDR_HIGH_0_WGS_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WGS_ADDR_HIGH_0_WGS_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WGS_ADDR_HIGH_0_WGS_ADDR_HIGH_SHIFT)


// Register CDMA_D_WGS_ADDR_LOW_0
#define CDMA_D_WGS_ADDR_LOW_0			_MK_ADDR_CONST(0x3088)
#define CDMA_D_WGS_ADDR_LOW_0_WGS_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WGS_ADDR_LOW_0_WGS_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WGS_ADDR_LOW_0_WGS_ADDR_LOW_SHIFT)


// Register CDMA_D_WMB_ADDR_HIGH_0
#define CDMA_D_WMB_ADDR_HIGH_0			_MK_ADDR_CONST(0x308c)
#define CDMA_D_WMB_ADDR_HIGH_0_WMB_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WMB_ADDR_HIGH_0_WMB_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WMB_ADDR_HIGH_0_WMB_ADDR_HIGH_SHIFT)


// Register CDMA_D_WMB_ADDR_LOW_0
#define CDMA_D_WMB_ADDR_LOW_0			_MK_ADDR_CONST(0x3090)
#define CDMA_D_WMB_ADDR_LOW_0_WMB_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WMB_ADDR_LOW_0_WMB_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_WMB_ADDR_LOW_0_WMB_ADDR_LOW_SHIFT)


// Register CDMA_D_WMB_BYTES_0
#define CDMA_D_WMB_BYTES_0			_MK_ADDR_CONST(0x3094)
#define CDMA_D_WMB_BYTES_0_WMB_BYTES_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_WMB_BYTES_0_WMB_BYTES_FIELD			_MK_FIELD_CONST(0xfffffff, CDMA_D_WMB_BYTES_0_WMB_BYTES_SHIFT)


// Register CDMA_D_MEAN_FORMAT_0
#define CDMA_D_MEAN_FORMAT_0			_MK_ADDR_CONST(0x3098)
#define CDMA_D_MEAN_FORMAT_0_MEAN_FORMAT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_MEAN_FORMAT_0_MEAN_FORMAT_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_MEAN_FORMAT_0_MEAN_FORMAT_SHIFT)
#define CDMA_D_MEAN_FORMAT_0_MEAN_FORMAT_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_MEAN_FORMAT_0_MEAN_FORMAT_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDMA_D_MEAN_GLOBAL_0_0
#define CDMA_D_MEAN_GLOBAL_0_0			_MK_ADDR_CONST(0x309c)
#define CDMA_D_MEAN_GLOBAL_0_0_MEAN_RY_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_MEAN_GLOBAL_0_0_MEAN_RY_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_MEAN_GLOBAL_0_0_MEAN_RY_SHIFT)
#define CDMA_D_MEAN_GLOBAL_0_0_MEAN_GU_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_MEAN_GLOBAL_0_0_MEAN_GU_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_MEAN_GLOBAL_0_0_MEAN_GU_SHIFT)


// Register CDMA_D_MEAN_GLOBAL_1_0
#define CDMA_D_MEAN_GLOBAL_1_0			_MK_ADDR_CONST(0x30a0)
#define CDMA_D_MEAN_GLOBAL_1_0_MEAN_BV_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_MEAN_GLOBAL_1_0_MEAN_BV_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_MEAN_GLOBAL_1_0_MEAN_BV_SHIFT)
#define CDMA_D_MEAN_GLOBAL_1_0_MEAN_AX_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_MEAN_GLOBAL_1_0_MEAN_AX_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_MEAN_GLOBAL_1_0_MEAN_AX_SHIFT)


// Register CDMA_D_CVT_CFG_0
#define CDMA_D_CVT_CFG_0			_MK_ADDR_CONST(0x30a4)
#define CDMA_D_CVT_CFG_0_CVT_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_CVT_CFG_0_CVT_EN_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_CVT_CFG_0_CVT_EN_SHIFT)
#define CDMA_D_CVT_CFG_0_CVT_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_CVT_CFG_0_CVT_EN_ENABLE			_MK_ENUM_CONST(0x1)
#define CDMA_D_CVT_CFG_0_CVT_TRUNCATE_SHIFT			_MK_SHIFT_CONST(4)
#define CDMA_D_CVT_CFG_0_CVT_TRUNCATE_FIELD			_MK_FIELD_CONST(0x3f, CDMA_D_CVT_CFG_0_CVT_TRUNCATE_SHIFT)


// Register CDMA_D_CVT_OFFSET_0
#define CDMA_D_CVT_OFFSET_0			_MK_ADDR_CONST(0x30a8)
#define CDMA_D_CVT_OFFSET_0_CVT_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_CVT_OFFSET_0_CVT_OFFSET_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_CVT_OFFSET_0_CVT_OFFSET_SHIFT)


// Register CDMA_D_CVT_SCALE_0
#define CDMA_D_CVT_SCALE_0			_MK_ADDR_CONST(0x30ac)
#define CDMA_D_CVT_SCALE_0_CVT_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_CVT_SCALE_0_CVT_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_CVT_SCALE_0_CVT_SCALE_SHIFT)


// Register CDMA_D_CONV_STRIDE_0
#define CDMA_D_CONV_STRIDE_0			_MK_ADDR_CONST(0x30b0)
#define CDMA_D_CONV_STRIDE_0_CONV_X_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_CONV_STRIDE_0_CONV_X_STRIDE_FIELD			_MK_FIELD_CONST(0x7, CDMA_D_CONV_STRIDE_0_CONV_X_STRIDE_SHIFT)
#define CDMA_D_CONV_STRIDE_0_CONV_Y_STRIDE_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_CONV_STRIDE_0_CONV_Y_STRIDE_FIELD			_MK_FIELD_CONST(0x7, CDMA_D_CONV_STRIDE_0_CONV_Y_STRIDE_SHIFT)


// Register CDMA_D_ZERO_PADDING_0
#define CDMA_D_ZERO_PADDING_0			_MK_ADDR_CONST(0x30b4)
#define CDMA_D_ZERO_PADDING_0_PAD_LEFT_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_ZERO_PADDING_0_PAD_LEFT_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_ZERO_PADDING_0_PAD_LEFT_SHIFT)
#define CDMA_D_ZERO_PADDING_0_PAD_RIGHT_SHIFT			_MK_SHIFT_CONST(8)
#define CDMA_D_ZERO_PADDING_0_PAD_RIGHT_FIELD			_MK_FIELD_CONST(0x3f, CDMA_D_ZERO_PADDING_0_PAD_RIGHT_SHIFT)
#define CDMA_D_ZERO_PADDING_0_PAD_TOP_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_ZERO_PADDING_0_PAD_TOP_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_ZERO_PADDING_0_PAD_TOP_SHIFT)
#define CDMA_D_ZERO_PADDING_0_PAD_BOTTOM_SHIFT			_MK_SHIFT_CONST(24)
#define CDMA_D_ZERO_PADDING_0_PAD_BOTTOM_FIELD			_MK_FIELD_CONST(0x3f, CDMA_D_ZERO_PADDING_0_PAD_BOTTOM_SHIFT)


// Register CDMA_D_ZERO_PADDING_VALUE_0
#define CDMA_D_ZERO_PADDING_VALUE_0			_MK_ADDR_CONST(0x30b8)
#define CDMA_D_ZERO_PADDING_VALUE_0_PAD_VALUE_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_ZERO_PADDING_VALUE_0_PAD_VALUE_FIELD			_MK_FIELD_CONST(0xffff, CDMA_D_ZERO_PADDING_VALUE_0_PAD_VALUE_SHIFT)


// Register CDMA_D_BANK_0
#define CDMA_D_BANK_0			_MK_ADDR_CONST(0x30bc)
#define CDMA_D_BANK_0_DATA_BANK_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_BANK_0_DATA_BANK_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_BANK_0_DATA_BANK_SHIFT)
#define CDMA_D_BANK_0_WEIGHT_BANK_SHIFT			_MK_SHIFT_CONST(16)
#define CDMA_D_BANK_0_WEIGHT_BANK_FIELD			_MK_FIELD_CONST(0x1f, CDMA_D_BANK_0_WEIGHT_BANK_SHIFT)


// Register CDMA_D_NAN_FLUSH_TO_ZERO_0
#define CDMA_D_NAN_FLUSH_TO_ZERO_0			_MK_ADDR_CONST(0x30c0)
#define CDMA_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_SHIFT)
#define CDMA_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_DISABLE			_MK_ENUM_CONST(0x0)
#define CDMA_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDMA_D_NAN_INPUT_DATA_NUM_0
#define CDMA_D_NAN_INPUT_DATA_NUM_0			_MK_ADDR_CONST(0x30c4)
#define CDMA_D_NAN_INPUT_DATA_NUM_0_NAN_DATA_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_NAN_INPUT_DATA_NUM_0_NAN_DATA_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_NAN_INPUT_DATA_NUM_0_NAN_DATA_NUM_SHIFT)


// Register CDMA_D_NAN_INPUT_WEIGHT_NUM_0
#define CDMA_D_NAN_INPUT_WEIGHT_NUM_0			_MK_ADDR_CONST(0x30c8)
#define CDMA_D_NAN_INPUT_WEIGHT_NUM_0_NAN_WEIGHT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_NAN_INPUT_WEIGHT_NUM_0_NAN_WEIGHT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_NAN_INPUT_WEIGHT_NUM_0_NAN_WEIGHT_NUM_SHIFT)


// Register CDMA_D_INF_INPUT_DATA_NUM_0
#define CDMA_D_INF_INPUT_DATA_NUM_0			_MK_ADDR_CONST(0x30cc)
#define CDMA_D_INF_INPUT_DATA_NUM_0_INF_DATA_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_INF_INPUT_DATA_NUM_0_INF_DATA_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_INF_INPUT_DATA_NUM_0_INF_DATA_NUM_SHIFT)


// Register CDMA_D_INF_INPUT_WEIGHT_NUM_0
#define CDMA_D_INF_INPUT_WEIGHT_NUM_0			_MK_ADDR_CONST(0x30d0)
#define CDMA_D_INF_INPUT_WEIGHT_NUM_0_INF_WEIGHT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_INF_INPUT_WEIGHT_NUM_0_INF_WEIGHT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_INF_INPUT_WEIGHT_NUM_0_INF_WEIGHT_NUM_SHIFT)


// Register CDMA_D_PERF_ENABLE_0
#define CDMA_D_PERF_ENABLE_0			_MK_ADDR_CONST(0x30d4)
#define CDMA_D_PERF_ENABLE_0_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_PERF_ENABLE_0_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, CDMA_D_PERF_ENABLE_0_DMA_EN_SHIFT)


// Register CDMA_D_PERF_DAT_READ_STALL_0
#define CDMA_D_PERF_DAT_READ_STALL_0			_MK_ADDR_CONST(0x30d8)
#define CDMA_D_PERF_DAT_READ_STALL_0_DAT_RD_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_PERF_DAT_READ_STALL_0_DAT_RD_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_PERF_DAT_READ_STALL_0_DAT_RD_STALL_SHIFT)


// Register CDMA_D_PERF_WT_READ_STALL_0
#define CDMA_D_PERF_WT_READ_STALL_0			_MK_ADDR_CONST(0x30dc)
#define CDMA_D_PERF_WT_READ_STALL_0_WT_RD_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_PERF_WT_READ_STALL_0_WT_RD_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_PERF_WT_READ_STALL_0_WT_RD_STALL_SHIFT)


// Register CDMA_D_PERF_DAT_READ_LATENCY_0
#define CDMA_D_PERF_DAT_READ_LATENCY_0			_MK_ADDR_CONST(0x30e0)
#define CDMA_D_PERF_DAT_READ_LATENCY_0_DAT_RD_LATENCY_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_PERF_DAT_READ_LATENCY_0_DAT_RD_LATENCY_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_PERF_DAT_READ_LATENCY_0_DAT_RD_LATENCY_SHIFT)


// Register CDMA_D_PERF_WT_READ_LATENCY_0
#define CDMA_D_PERF_WT_READ_LATENCY_0			_MK_ADDR_CONST(0x30e4)
#define CDMA_D_PERF_WT_READ_LATENCY_0_WT_RD_LATENCY_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_PERF_WT_READ_LATENCY_0_WT_RD_LATENCY_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_PERF_WT_READ_LATENCY_0_WT_RD_LATENCY_SHIFT)


// Register CDMA_D_CYA_0
#define CDMA_D_CYA_0			_MK_ADDR_CONST(0x30e8)
#define CDMA_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define CDMA_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, CDMA_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CSC_S_STATUS_0
#define CSC_S_STATUS_0			_MK_ADDR_CONST(0x4000)
#define CSC_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CSC_S_STATUS_0_STATUS_0_SHIFT)
#define CSC_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CSC_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CSC_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CSC_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CSC_S_STATUS_0_STATUS_1_SHIFT)
#define CSC_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CSC_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CSC_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CSC_S_POINTER_0
#define CSC_S_POINTER_0			_MK_ADDR_CONST(0x4004)
#define CSC_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CSC_S_POINTER_0_PRODUCER_SHIFT)
#define CSC_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CSC_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CSC_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CSC_S_POINTER_0_CONSUMER_SHIFT)
#define CSC_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CSC_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CSC_D_OP_ENABLE_0
#define CSC_D_OP_ENABLE_0			_MK_ADDR_CONST(0x4008)
#define CSC_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CSC_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CSC_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CSC_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CSC_D_MISC_CFG_0
#define CSC_D_MISC_CFG_0			_MK_ADDR_CONST(0x400c)
#define CSC_D_MISC_CFG_0_CONV_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_MISC_CFG_0_CONV_MODE_FIELD			_MK_FIELD_CONST(0x1, CSC_D_MISC_CFG_0_CONV_MODE_SHIFT)
#define CSC_D_MISC_CFG_0_CONV_MODE_DIRECT			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_CONV_MODE_WINOGRAD			_MK_ENUM_CONST(0x1)
#define CSC_D_MISC_CFG_0_IN_PRECISION_SHIFT			_MK_SHIFT_CONST(8)
#define CSC_D_MISC_CFG_0_IN_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CSC_D_MISC_CFG_0_IN_PRECISION_SHIFT)
#define CSC_D_MISC_CFG_0_IN_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_IN_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CSC_D_MISC_CFG_0_IN_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define CSC_D_MISC_CFG_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(12)
#define CSC_D_MISC_CFG_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CSC_D_MISC_CFG_0_PROC_PRECISION_SHIFT)
#define CSC_D_MISC_CFG_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CSC_D_MISC_CFG_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define CSC_D_MISC_CFG_0_DATA_REUSE_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_MISC_CFG_0_DATA_REUSE_FIELD			_MK_FIELD_CONST(0x1, CSC_D_MISC_CFG_0_DATA_REUSE_SHIFT)
#define CSC_D_MISC_CFG_0_DATA_REUSE_DISABLE			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_DATA_REUSE_ENABLE			_MK_ENUM_CONST(0x1)
#define CSC_D_MISC_CFG_0_WEIGHT_REUSE_SHIFT			_MK_SHIFT_CONST(20)
#define CSC_D_MISC_CFG_0_WEIGHT_REUSE_FIELD			_MK_FIELD_CONST(0x1, CSC_D_MISC_CFG_0_WEIGHT_REUSE_SHIFT)
#define CSC_D_MISC_CFG_0_WEIGHT_REUSE_DISABLE			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_WEIGHT_REUSE_ENABLE			_MK_ENUM_CONST(0x1)
#define CSC_D_MISC_CFG_0_SKIP_DATA_RLS_SHIFT			_MK_SHIFT_CONST(24)
#define CSC_D_MISC_CFG_0_SKIP_DATA_RLS_FIELD			_MK_FIELD_CONST(0x1, CSC_D_MISC_CFG_0_SKIP_DATA_RLS_SHIFT)
#define CSC_D_MISC_CFG_0_SKIP_DATA_RLS_DISABLE			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_SKIP_DATA_RLS_ENABLE			_MK_ENUM_CONST(0x1)
#define CSC_D_MISC_CFG_0_SKIP_WEIGHT_RLS_SHIFT			_MK_SHIFT_CONST(28)
#define CSC_D_MISC_CFG_0_SKIP_WEIGHT_RLS_FIELD			_MK_FIELD_CONST(0x1, CSC_D_MISC_CFG_0_SKIP_WEIGHT_RLS_SHIFT)
#define CSC_D_MISC_CFG_0_SKIP_WEIGHT_RLS_DISABLE			_MK_ENUM_CONST(0x0)
#define CSC_D_MISC_CFG_0_SKIP_WEIGHT_RLS_ENABLE			_MK_ENUM_CONST(0x1)


// Register CSC_D_DATAIN_FORMAT_0
#define CSC_D_DATAIN_FORMAT_0			_MK_ADDR_CONST(0x4010)
#define CSC_D_DATAIN_FORMAT_0_DATAIN_FORMAT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_DATAIN_FORMAT_0_DATAIN_FORMAT_FIELD			_MK_FIELD_CONST(0x1, CSC_D_DATAIN_FORMAT_0_DATAIN_FORMAT_SHIFT)
#define CSC_D_DATAIN_FORMAT_0_DATAIN_FORMAT_FEATURE			_MK_ENUM_CONST(0x0)
#define CSC_D_DATAIN_FORMAT_0_DATAIN_FORMAT_PIXEL			_MK_ENUM_CONST(0x1)


// Register CSC_D_DATAIN_SIZE_EXT_0_0
#define CSC_D_DATAIN_SIZE_EXT_0_0			_MK_ADDR_CONST(0x4014)
#define CSC_D_DATAIN_SIZE_EXT_0_0_DATAIN_WIDTH_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_DATAIN_SIZE_EXT_0_0_DATAIN_WIDTH_EXT_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_DATAIN_SIZE_EXT_0_0_DATAIN_WIDTH_EXT_SHIFT)
#define CSC_D_DATAIN_SIZE_EXT_0_0_DATAIN_HEIGHT_EXT_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_DATAIN_SIZE_EXT_0_0_DATAIN_HEIGHT_EXT_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_DATAIN_SIZE_EXT_0_0_DATAIN_HEIGHT_EXT_SHIFT)


// Register CSC_D_DATAIN_SIZE_EXT_1_0
#define CSC_D_DATAIN_SIZE_EXT_1_0			_MK_ADDR_CONST(0x4018)
#define CSC_D_DATAIN_SIZE_EXT_1_0_DATAIN_CHANNEL_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_DATAIN_SIZE_EXT_1_0_DATAIN_CHANNEL_EXT_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_DATAIN_SIZE_EXT_1_0_DATAIN_CHANNEL_EXT_SHIFT)


// Register CSC_D_BATCH_NUMBER_0
#define CSC_D_BATCH_NUMBER_0			_MK_ADDR_CONST(0x401c)
#define CSC_D_BATCH_NUMBER_0_BATCHES_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_BATCH_NUMBER_0_BATCHES_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_BATCH_NUMBER_0_BATCHES_SHIFT)


// Register CSC_D_POST_Y_EXTENSION_0
#define CSC_D_POST_Y_EXTENSION_0			_MK_ADDR_CONST(0x4020)
#define CSC_D_POST_Y_EXTENSION_0_Y_EXTENSION_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_POST_Y_EXTENSION_0_Y_EXTENSION_FIELD			_MK_FIELD_CONST(0x3, CSC_D_POST_Y_EXTENSION_0_Y_EXTENSION_SHIFT)


// Register CSC_D_ENTRY_PER_SLICE_0
#define CSC_D_ENTRY_PER_SLICE_0			_MK_ADDR_CONST(0x4024)
#define CSC_D_ENTRY_PER_SLICE_0_ENTRIES_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_ENTRY_PER_SLICE_0_ENTRIES_FIELD			_MK_FIELD_CONST(0x3fff, CSC_D_ENTRY_PER_SLICE_0_ENTRIES_SHIFT)


// Register CSC_D_WEIGHT_FORMAT_0
#define CSC_D_WEIGHT_FORMAT_0			_MK_ADDR_CONST(0x4028)
#define CSC_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_FIELD			_MK_FIELD_CONST(0x1, CSC_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_SHIFT)
#define CSC_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_UNCOMPRESSED			_MK_ENUM_CONST(0x0)
#define CSC_D_WEIGHT_FORMAT_0_WEIGHT_FORMAT_COMPRESSED			_MK_ENUM_CONST(0x1)


// Register CSC_D_WEIGHT_SIZE_EXT_0_0
#define CSC_D_WEIGHT_SIZE_EXT_0_0			_MK_ADDR_CONST(0x402c)
#define CSC_D_WEIGHT_SIZE_EXT_0_0_WEIGHT_WIDTH_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_WEIGHT_SIZE_EXT_0_0_WEIGHT_WIDTH_EXT_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_WEIGHT_SIZE_EXT_0_0_WEIGHT_WIDTH_EXT_SHIFT)
#define CSC_D_WEIGHT_SIZE_EXT_0_0_WEIGHT_HEIGHT_EXT_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_WEIGHT_SIZE_EXT_0_0_WEIGHT_HEIGHT_EXT_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_WEIGHT_SIZE_EXT_0_0_WEIGHT_HEIGHT_EXT_SHIFT)


// Register CSC_D_WEIGHT_SIZE_EXT_1_0
#define CSC_D_WEIGHT_SIZE_EXT_1_0			_MK_ADDR_CONST(0x4030)
#define CSC_D_WEIGHT_SIZE_EXT_1_0_WEIGHT_CHANNEL_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_WEIGHT_SIZE_EXT_1_0_WEIGHT_CHANNEL_EXT_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_WEIGHT_SIZE_EXT_1_0_WEIGHT_CHANNEL_EXT_SHIFT)
#define CSC_D_WEIGHT_SIZE_EXT_1_0_WEIGHT_KERNEL_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_WEIGHT_SIZE_EXT_1_0_WEIGHT_KERNEL_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_WEIGHT_SIZE_EXT_1_0_WEIGHT_KERNEL_SHIFT)


// Register CSC_D_WEIGHT_BYTES_0
#define CSC_D_WEIGHT_BYTES_0			_MK_ADDR_CONST(0x4034)
#define CSC_D_WEIGHT_BYTES_0_WEIGHT_BYTES_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_WEIGHT_BYTES_0_WEIGHT_BYTES_FIELD			_MK_FIELD_CONST(0xffffffff, CSC_D_WEIGHT_BYTES_0_WEIGHT_BYTES_SHIFT)


// Register CSC_D_WMB_BYTES_0
#define CSC_D_WMB_BYTES_0			_MK_ADDR_CONST(0x4038)
#define CSC_D_WMB_BYTES_0_WMB_BYTES_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_WMB_BYTES_0_WMB_BYTES_FIELD			_MK_FIELD_CONST(0xfffffff, CSC_D_WMB_BYTES_0_WMB_BYTES_SHIFT)


// Register CSC_D_DATAOUT_SIZE_0_0
#define CSC_D_DATAOUT_SIZE_0_0			_MK_ADDR_CONST(0x403c)
#define CSC_D_DATAOUT_SIZE_0_0_DATAOUT_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_DATAOUT_SIZE_0_0_DATAOUT_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_DATAOUT_SIZE_0_0_DATAOUT_WIDTH_SHIFT)
#define CSC_D_DATAOUT_SIZE_0_0_DATAOUT_HEIGHT_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_DATAOUT_SIZE_0_0_DATAOUT_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_DATAOUT_SIZE_0_0_DATAOUT_HEIGHT_SHIFT)


// Register CSC_D_DATAOUT_SIZE_1_0
#define CSC_D_DATAOUT_SIZE_1_0			_MK_ADDR_CONST(0x4040)
#define CSC_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, CSC_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_SHIFT)


// Register CSC_D_ATOMICS_0
#define CSC_D_ATOMICS_0			_MK_ADDR_CONST(0x4044)
#define CSC_D_ATOMICS_0_ATOMICS_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_ATOMICS_0_ATOMICS_FIELD			_MK_FIELD_CONST(0x1fffff, CSC_D_ATOMICS_0_ATOMICS_SHIFT)


// Register CSC_D_RELEASE_0
#define CSC_D_RELEASE_0			_MK_ADDR_CONST(0x4048)
#define CSC_D_RELEASE_0_RLS_SLICES_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_RELEASE_0_RLS_SLICES_FIELD			_MK_FIELD_CONST(0xfff, CSC_D_RELEASE_0_RLS_SLICES_SHIFT)


// Register CSC_D_CONV_STRIDE_EXT_0
#define CSC_D_CONV_STRIDE_EXT_0			_MK_ADDR_CONST(0x404c)
#define CSC_D_CONV_STRIDE_EXT_0_CONV_X_STRIDE_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_CONV_STRIDE_EXT_0_CONV_X_STRIDE_EXT_FIELD			_MK_FIELD_CONST(0x7, CSC_D_CONV_STRIDE_EXT_0_CONV_X_STRIDE_EXT_SHIFT)
#define CSC_D_CONV_STRIDE_EXT_0_CONV_Y_STRIDE_EXT_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_CONV_STRIDE_EXT_0_CONV_Y_STRIDE_EXT_FIELD			_MK_FIELD_CONST(0x7, CSC_D_CONV_STRIDE_EXT_0_CONV_Y_STRIDE_EXT_SHIFT)


// Register CSC_D_DILATION_EXT_0
#define CSC_D_DILATION_EXT_0			_MK_ADDR_CONST(0x4050)
#define CSC_D_DILATION_EXT_0_X_DILATION_EXT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_DILATION_EXT_0_X_DILATION_EXT_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_DILATION_EXT_0_X_DILATION_EXT_SHIFT)
#define CSC_D_DILATION_EXT_0_Y_DILATION_EXT_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_DILATION_EXT_0_Y_DILATION_EXT_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_DILATION_EXT_0_Y_DILATION_EXT_SHIFT)


// Register CSC_D_ZERO_PADDING_0
#define CSC_D_ZERO_PADDING_0			_MK_ADDR_CONST(0x4054)
#define CSC_D_ZERO_PADDING_0_PAD_LEFT_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_ZERO_PADDING_0_PAD_LEFT_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_ZERO_PADDING_0_PAD_LEFT_SHIFT)
#define CSC_D_ZERO_PADDING_0_PAD_TOP_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_ZERO_PADDING_0_PAD_TOP_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_ZERO_PADDING_0_PAD_TOP_SHIFT)


// Register CSC_D_ZERO_PADDING_VALUE_0
#define CSC_D_ZERO_PADDING_VALUE_0			_MK_ADDR_CONST(0x4058)
#define CSC_D_ZERO_PADDING_VALUE_0_PAD_VALUE_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_ZERO_PADDING_VALUE_0_PAD_VALUE_FIELD			_MK_FIELD_CONST(0xffff, CSC_D_ZERO_PADDING_VALUE_0_PAD_VALUE_SHIFT)


// Register CSC_D_BANK_0
#define CSC_D_BANK_0			_MK_ADDR_CONST(0x405c)
#define CSC_D_BANK_0_DATA_BANK_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_BANK_0_DATA_BANK_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_BANK_0_DATA_BANK_SHIFT)
#define CSC_D_BANK_0_WEIGHT_BANK_SHIFT			_MK_SHIFT_CONST(16)
#define CSC_D_BANK_0_WEIGHT_BANK_FIELD			_MK_FIELD_CONST(0x1f, CSC_D_BANK_0_WEIGHT_BANK_SHIFT)


// Register CSC_D_PRA_CFG_0
#define CSC_D_PRA_CFG_0			_MK_ADDR_CONST(0x4060)
#define CSC_D_PRA_CFG_0_PRA_TRUNCATE_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_PRA_CFG_0_PRA_TRUNCATE_FIELD			_MK_FIELD_CONST(0x3, CSC_D_PRA_CFG_0_PRA_TRUNCATE_SHIFT)


// Register CSC_D_CYA_0
#define CSC_D_CYA_0			_MK_ADDR_CONST(0x4064)
#define CSC_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define CSC_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, CSC_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CMAC_A_S_STATUS_0
#define CMAC_A_S_STATUS_0			_MK_ADDR_CONST(0x5000)
#define CMAC_A_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_A_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CMAC_A_S_STATUS_0_STATUS_0_SHIFT)
#define CMAC_A_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CMAC_A_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CMAC_A_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CMAC_A_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CMAC_A_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CMAC_A_S_STATUS_0_STATUS_1_SHIFT)
#define CMAC_A_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CMAC_A_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CMAC_A_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CMAC_A_S_POINTER_0
#define CMAC_A_S_POINTER_0			_MK_ADDR_CONST(0x5004)
#define CMAC_A_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_A_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CMAC_A_S_POINTER_0_PRODUCER_SHIFT)
#define CMAC_A_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CMAC_A_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CMAC_A_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CMAC_A_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CMAC_A_S_POINTER_0_CONSUMER_SHIFT)
#define CMAC_A_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CMAC_A_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CMAC_A_D_OP_ENABLE_0
#define CMAC_A_D_OP_ENABLE_0			_MK_ADDR_CONST(0x5008)
#define CMAC_A_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_A_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CMAC_A_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CMAC_A_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CMAC_A_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CMAC_A_D_MISC_CFG_0
#define CMAC_A_D_MISC_CFG_0			_MK_ADDR_CONST(0x500c)
#define CMAC_A_D_MISC_CFG_0_CONV_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_A_D_MISC_CFG_0_CONV_MODE_FIELD			_MK_FIELD_CONST(0x1, CMAC_A_D_MISC_CFG_0_CONV_MODE_SHIFT)
#define CMAC_A_D_MISC_CFG_0_CONV_MODE_DIRECT			_MK_ENUM_CONST(0x0)
#define CMAC_A_D_MISC_CFG_0_CONV_MODE_WINOGRAD			_MK_ENUM_CONST(0x1)
#define CMAC_A_D_MISC_CFG_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(12)
#define CMAC_A_D_MISC_CFG_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CMAC_A_D_MISC_CFG_0_PROC_PRECISION_SHIFT)
#define CMAC_A_D_MISC_CFG_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CMAC_A_D_MISC_CFG_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CMAC_A_D_MISC_CFG_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CMAC_B_S_STATUS_0
#define CMAC_B_S_STATUS_0			_MK_ADDR_CONST(0x6000)
#define CMAC_B_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_B_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CMAC_B_S_STATUS_0_STATUS_0_SHIFT)
#define CMAC_B_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CMAC_B_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CMAC_B_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CMAC_B_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CMAC_B_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CMAC_B_S_STATUS_0_STATUS_1_SHIFT)
#define CMAC_B_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CMAC_B_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CMAC_B_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CMAC_B_S_POINTER_0
#define CMAC_B_S_POINTER_0			_MK_ADDR_CONST(0x6004)
#define CMAC_B_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_B_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CMAC_B_S_POINTER_0_PRODUCER_SHIFT)
#define CMAC_B_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CMAC_B_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CMAC_B_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CMAC_B_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CMAC_B_S_POINTER_0_CONSUMER_SHIFT)
#define CMAC_B_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CMAC_B_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CMAC_B_D_OP_ENABLE_0
#define CMAC_B_D_OP_ENABLE_0			_MK_ADDR_CONST(0x6008)
#define CMAC_B_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_B_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CMAC_B_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CMAC_B_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CMAC_B_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CMAC_B_D_MISC_CFG_0
#define CMAC_B_D_MISC_CFG_0			_MK_ADDR_CONST(0x600c)
#define CMAC_B_D_MISC_CFG_0_CONV_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define CMAC_B_D_MISC_CFG_0_CONV_MODE_FIELD			_MK_FIELD_CONST(0x1, CMAC_B_D_MISC_CFG_0_CONV_MODE_SHIFT)
#define CMAC_B_D_MISC_CFG_0_CONV_MODE_DIRECT			_MK_ENUM_CONST(0x0)
#define CMAC_B_D_MISC_CFG_0_CONV_MODE_WINOGRAD			_MK_ENUM_CONST(0x1)
#define CMAC_B_D_MISC_CFG_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(12)
#define CMAC_B_D_MISC_CFG_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CMAC_B_D_MISC_CFG_0_PROC_PRECISION_SHIFT)
#define CMAC_B_D_MISC_CFG_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CMAC_B_D_MISC_CFG_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CMAC_B_D_MISC_CFG_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CACC_S_STATUS_0
#define CACC_S_STATUS_0			_MK_ADDR_CONST(0x7000)
#define CACC_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CACC_S_STATUS_0_STATUS_0_SHIFT)
#define CACC_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CACC_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CACC_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CACC_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CACC_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CACC_S_STATUS_0_STATUS_1_SHIFT)
#define CACC_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CACC_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CACC_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CACC_S_POINTER_0
#define CACC_S_POINTER_0			_MK_ADDR_CONST(0x7004)
#define CACC_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CACC_S_POINTER_0_PRODUCER_SHIFT)
#define CACC_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CACC_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CACC_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CACC_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CACC_S_POINTER_0_CONSUMER_SHIFT)
#define CACC_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CACC_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CACC_D_OP_ENABLE_0
#define CACC_D_OP_ENABLE_0			_MK_ADDR_CONST(0x7008)
#define CACC_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CACC_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CACC_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CACC_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CACC_D_MISC_CFG_0
#define CACC_D_MISC_CFG_0			_MK_ADDR_CONST(0x700c)
#define CACC_D_MISC_CFG_0_CONV_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_MISC_CFG_0_CONV_MODE_FIELD			_MK_FIELD_CONST(0x1, CACC_D_MISC_CFG_0_CONV_MODE_SHIFT)
#define CACC_D_MISC_CFG_0_CONV_MODE_DIRECT			_MK_ENUM_CONST(0x0)
#define CACC_D_MISC_CFG_0_CONV_MODE_WINOGRAD			_MK_ENUM_CONST(0x1)
#define CACC_D_MISC_CFG_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(12)
#define CACC_D_MISC_CFG_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, CACC_D_MISC_CFG_0_PROC_PRECISION_SHIFT)
#define CACC_D_MISC_CFG_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define CACC_D_MISC_CFG_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define CACC_D_MISC_CFG_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)


// Register CACC_D_DATAOUT_SIZE_0_0
#define CACC_D_DATAOUT_SIZE_0_0			_MK_ADDR_CONST(0x7010)
#define CACC_D_DATAOUT_SIZE_0_0_DATAOUT_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_DATAOUT_SIZE_0_0_DATAOUT_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, CACC_D_DATAOUT_SIZE_0_0_DATAOUT_WIDTH_SHIFT)
#define CACC_D_DATAOUT_SIZE_0_0_DATAOUT_HEIGHT_SHIFT			_MK_SHIFT_CONST(16)
#define CACC_D_DATAOUT_SIZE_0_0_DATAOUT_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, CACC_D_DATAOUT_SIZE_0_0_DATAOUT_HEIGHT_SHIFT)


// Register CACC_D_DATAOUT_SIZE_1_0
#define CACC_D_DATAOUT_SIZE_1_0			_MK_ADDR_CONST(0x7014)
#define CACC_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, CACC_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_SHIFT)


// Register CACC_D_DATAOUT_ADDR_0
#define CACC_D_DATAOUT_ADDR_0			_MK_ADDR_CONST(0x7018)
#define CACC_D_DATAOUT_ADDR_0_DATAOUT_ADDR_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_DATAOUT_ADDR_0_DATAOUT_ADDR_FIELD			_MK_FIELD_CONST(0xffffffff, CACC_D_DATAOUT_ADDR_0_DATAOUT_ADDR_SHIFT)


// Register CACC_D_BATCH_NUMBER_0
#define CACC_D_BATCH_NUMBER_0			_MK_ADDR_CONST(0x701c)
#define CACC_D_BATCH_NUMBER_0_BATCHES_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_BATCH_NUMBER_0_BATCHES_FIELD			_MK_FIELD_CONST(0x1f, CACC_D_BATCH_NUMBER_0_BATCHES_SHIFT)


// Register CACC_D_LINE_STRIDE_0
#define CACC_D_LINE_STRIDE_0			_MK_ADDR_CONST(0x7020)
#define CACC_D_LINE_STRIDE_0_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_LINE_STRIDE_0_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffff, CACC_D_LINE_STRIDE_0_LINE_STRIDE_SHIFT)


// Register CACC_D_SURF_STRIDE_0
#define CACC_D_SURF_STRIDE_0			_MK_ADDR_CONST(0x7024)
#define CACC_D_SURF_STRIDE_0_SURF_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_SURF_STRIDE_0_SURF_STRIDE_FIELD			_MK_FIELD_CONST(0xffffff, CACC_D_SURF_STRIDE_0_SURF_STRIDE_SHIFT)


// Register CACC_D_DATAOUT_MAP_0
#define CACC_D_DATAOUT_MAP_0			_MK_ADDR_CONST(0x7028)
#define CACC_D_DATAOUT_MAP_0_LINE_PACKED_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_DATAOUT_MAP_0_LINE_PACKED_FIELD			_MK_FIELD_CONST(0x1, CACC_D_DATAOUT_MAP_0_LINE_PACKED_SHIFT)
#define CACC_D_DATAOUT_MAP_0_LINE_PACKED_FALSE			_MK_ENUM_CONST(0x0)
#define CACC_D_DATAOUT_MAP_0_LINE_PACKED_TRUE			_MK_ENUM_CONST(0x1)
#define CACC_D_DATAOUT_MAP_0_SURF_PACKED_SHIFT			_MK_SHIFT_CONST(16)
#define CACC_D_DATAOUT_MAP_0_SURF_PACKED_FIELD			_MK_FIELD_CONST(0x1, CACC_D_DATAOUT_MAP_0_SURF_PACKED_SHIFT)
#define CACC_D_DATAOUT_MAP_0_SURF_PACKED_FALSE			_MK_ENUM_CONST(0x0)
#define CACC_D_DATAOUT_MAP_0_SURF_PACKED_TRUE			_MK_ENUM_CONST(0x1)


// Register CACC_D_CLIP_CFG_0
#define CACC_D_CLIP_CFG_0			_MK_ADDR_CONST(0x702c)
#define CACC_D_CLIP_CFG_0_CLIP_TRUNCATE_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_CLIP_CFG_0_CLIP_TRUNCATE_FIELD			_MK_FIELD_CONST(0x1f, CACC_D_CLIP_CFG_0_CLIP_TRUNCATE_SHIFT)


// Register CACC_D_OUT_SATURATION_0
#define CACC_D_OUT_SATURATION_0			_MK_ADDR_CONST(0x7030)
#define CACC_D_OUT_SATURATION_0_SAT_COUNT_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_OUT_SATURATION_0_SAT_COUNT_FIELD			_MK_FIELD_CONST(0xffffffff, CACC_D_OUT_SATURATION_0_SAT_COUNT_SHIFT)


// Register CACC_D_CYA_0
#define CACC_D_CYA_0			_MK_ADDR_CONST(0x7034)
#define CACC_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define CACC_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, CACC_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register SDP_RDMA_S_STATUS_0
#define SDP_RDMA_S_STATUS_0			_MK_ADDR_CONST(0x8000)
#define SDP_RDMA_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_S_STATUS_0_STATUS_0_SHIFT)
#define SDP_RDMA_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_RDMA_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_S_STATUS_0_STATUS_1_SHIFT)
#define SDP_RDMA_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register SDP_RDMA_S_POINTER_0
#define SDP_RDMA_S_POINTER_0			_MK_ADDR_CONST(0x8004)
#define SDP_RDMA_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_S_POINTER_0_PRODUCER_SHIFT)
#define SDP_RDMA_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_RDMA_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_S_POINTER_0_CONSUMER_SHIFT)
#define SDP_RDMA_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_OP_ENABLE_0
#define SDP_RDMA_D_OP_ENABLE_0			_MK_ADDR_CONST(0x8008)
#define SDP_RDMA_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_OP_ENABLE_0_OP_EN_SHIFT)
#define SDP_RDMA_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_DATA_CUBE_WIDTH_0
#define SDP_RDMA_D_DATA_CUBE_WIDTH_0			_MK_ADDR_CONST(0x800c)
#define SDP_RDMA_D_DATA_CUBE_WIDTH_0_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_DATA_CUBE_WIDTH_0_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, SDP_RDMA_D_DATA_CUBE_WIDTH_0_WIDTH_SHIFT)


// Register SDP_RDMA_D_DATA_CUBE_HEIGHT_0
#define SDP_RDMA_D_DATA_CUBE_HEIGHT_0			_MK_ADDR_CONST(0x8010)
#define SDP_RDMA_D_DATA_CUBE_HEIGHT_0_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_DATA_CUBE_HEIGHT_0_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, SDP_RDMA_D_DATA_CUBE_HEIGHT_0_HEIGHT_SHIFT)


// Register SDP_RDMA_D_DATA_CUBE_CHANNEL_0
#define SDP_RDMA_D_DATA_CUBE_CHANNEL_0			_MK_ADDR_CONST(0x8014)
#define SDP_RDMA_D_DATA_CUBE_CHANNEL_0_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_DATA_CUBE_CHANNEL_0_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, SDP_RDMA_D_DATA_CUBE_CHANNEL_0_CHANNEL_SHIFT)


// Register SDP_RDMA_D_SRC_BASE_ADDR_LOW_0
#define SDP_RDMA_D_SRC_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0x8018)
#define SDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT)


// Register SDP_RDMA_D_SRC_BASE_ADDR_HIGH_0
#define SDP_RDMA_D_SRC_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0x801c)
#define SDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT)


// Register SDP_RDMA_D_SRC_LINE_STRIDE_0
#define SDP_RDMA_D_SRC_LINE_STRIDE_0			_MK_ADDR_CONST(0x8020)
#define SDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT)


// Register SDP_RDMA_D_SRC_SURFACE_STRIDE_0
#define SDP_RDMA_D_SRC_SURFACE_STRIDE_0			_MK_ADDR_CONST(0x8024)
#define SDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT)


// Register SDP_RDMA_D_BRDMA_CFG_0
#define SDP_RDMA_D_BRDMA_CFG_0			_MK_ADDR_CONST(0x8028)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DISABLE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DISABLE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DISABLE_SHIFT)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DISABLE_NO			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DISABLE_YES			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_USE_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_USE_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_USE_SHIFT)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_USE_MUL			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_USE_ALU			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_USE_BOTH			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_SIZE_SHIFT			_MK_SHIFT_CONST(3)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_SIZE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_SIZE_SHIFT)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_SIZE_ONE_BYTE			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_SIZE_TWO_BYTE			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_MODE_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_MODE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_MODE_SHIFT)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_MODE_PER_KERNEL			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_DATA_MODE_PER_ELEMENT			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_BRDMA_CFG_0_BRDMA_RAM_TYPE_SHIFT)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_BRDMA_CFG_0_BRDMA_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_BS_BASE_ADDR_LOW_0
#define SDP_RDMA_D_BS_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0x802c)
#define SDP_RDMA_D_BS_BASE_ADDR_LOW_0_BS_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BS_BASE_ADDR_LOW_0_BS_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BS_BASE_ADDR_LOW_0_BS_BASE_ADDR_LOW_SHIFT)


// Register SDP_RDMA_D_BS_BASE_ADDR_HIGH_0
#define SDP_RDMA_D_BS_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0x8030)
#define SDP_RDMA_D_BS_BASE_ADDR_HIGH_0_BS_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BS_BASE_ADDR_HIGH_0_BS_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BS_BASE_ADDR_HIGH_0_BS_BASE_ADDR_HIGH_SHIFT)


// Register SDP_RDMA_D_BS_LINE_STRIDE_0
#define SDP_RDMA_D_BS_LINE_STRIDE_0			_MK_ADDR_CONST(0x8034)
#define SDP_RDMA_D_BS_LINE_STRIDE_0_BS_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BS_LINE_STRIDE_0_BS_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BS_LINE_STRIDE_0_BS_LINE_STRIDE_SHIFT)


// Register SDP_RDMA_D_BS_SURFACE_STRIDE_0
#define SDP_RDMA_D_BS_SURFACE_STRIDE_0			_MK_ADDR_CONST(0x8038)
#define SDP_RDMA_D_BS_SURFACE_STRIDE_0_BS_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BS_SURFACE_STRIDE_0_BS_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BS_SURFACE_STRIDE_0_BS_SURFACE_STRIDE_SHIFT)


// Register SDP_RDMA_D_BS_BATCH_STRIDE_0
#define SDP_RDMA_D_BS_BATCH_STRIDE_0			_MK_ADDR_CONST(0x803c)
#define SDP_RDMA_D_BS_BATCH_STRIDE_0_BS_BATCH_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BS_BATCH_STRIDE_0_BS_BATCH_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BS_BATCH_STRIDE_0_BS_BATCH_STRIDE_SHIFT)


// Register SDP_RDMA_D_NRDMA_CFG_0
#define SDP_RDMA_D_NRDMA_CFG_0			_MK_ADDR_CONST(0x8040)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DISABLE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DISABLE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DISABLE_SHIFT)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DISABLE_NO			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DISABLE_YES			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_USE_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_USE_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_USE_SHIFT)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_USE_MUL			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_USE_ALU			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_USE_BOTH			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_SIZE_SHIFT			_MK_SHIFT_CONST(3)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_SIZE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_SIZE_SHIFT)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_SIZE_ONE_BYTE			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_SIZE_TWO_BYTE			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_MODE_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_MODE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_MODE_SHIFT)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_MODE_PER_KERNEL			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_DATA_MODE_PER_ELEMENT			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_NRDMA_CFG_0_NRDMA_RAM_TYPE_SHIFT)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_NRDMA_CFG_0_NRDMA_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_BN_BASE_ADDR_LOW_0
#define SDP_RDMA_D_BN_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0x8044)
#define SDP_RDMA_D_BN_BASE_ADDR_LOW_0_BN_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BN_BASE_ADDR_LOW_0_BN_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BN_BASE_ADDR_LOW_0_BN_BASE_ADDR_LOW_SHIFT)


// Register SDP_RDMA_D_BN_BASE_ADDR_HIGH_0
#define SDP_RDMA_D_BN_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0x8048)
#define SDP_RDMA_D_BN_BASE_ADDR_HIGH_0_BN_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BN_BASE_ADDR_HIGH_0_BN_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BN_BASE_ADDR_HIGH_0_BN_BASE_ADDR_HIGH_SHIFT)


// Register SDP_RDMA_D_BN_LINE_STRIDE_0
#define SDP_RDMA_D_BN_LINE_STRIDE_0			_MK_ADDR_CONST(0x804c)
#define SDP_RDMA_D_BN_LINE_STRIDE_0_BN_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BN_LINE_STRIDE_0_BN_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BN_LINE_STRIDE_0_BN_LINE_STRIDE_SHIFT)


// Register SDP_RDMA_D_BN_SURFACE_STRIDE_0
#define SDP_RDMA_D_BN_SURFACE_STRIDE_0			_MK_ADDR_CONST(0x8050)
#define SDP_RDMA_D_BN_SURFACE_STRIDE_0_BN_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BN_SURFACE_STRIDE_0_BN_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BN_SURFACE_STRIDE_0_BN_SURFACE_STRIDE_SHIFT)


// Register SDP_RDMA_D_BN_BATCH_STRIDE_0
#define SDP_RDMA_D_BN_BATCH_STRIDE_0			_MK_ADDR_CONST(0x8054)
#define SDP_RDMA_D_BN_BATCH_STRIDE_0_BN_BATCH_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_BN_BATCH_STRIDE_0_BN_BATCH_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_BN_BATCH_STRIDE_0_BN_BATCH_STRIDE_SHIFT)


// Register SDP_RDMA_D_ERDMA_CFG_0
#define SDP_RDMA_D_ERDMA_CFG_0			_MK_ADDR_CONST(0x8058)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DISABLE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DISABLE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DISABLE_SHIFT)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DISABLE_NO			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DISABLE_YES			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_USE_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_USE_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_USE_SHIFT)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_USE_MUL			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_USE_ALU			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_USE_BOTH			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_SIZE_SHIFT			_MK_SHIFT_CONST(3)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_SIZE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_SIZE_SHIFT)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_SIZE_ONE_BYTE			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_SIZE_TWO_BYTE			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_MODE_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_MODE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_MODE_SHIFT)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_MODE_PER_KERNEL			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_DATA_MODE_PER_ELEMENT			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_ERDMA_CFG_0_ERDMA_RAM_TYPE_SHIFT)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_ERDMA_CFG_0_ERDMA_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_EW_BASE_ADDR_LOW_0
#define SDP_RDMA_D_EW_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0x805c)
#define SDP_RDMA_D_EW_BASE_ADDR_LOW_0_EW_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_EW_BASE_ADDR_LOW_0_EW_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_EW_BASE_ADDR_LOW_0_EW_BASE_ADDR_LOW_SHIFT)


// Register SDP_RDMA_D_EW_BASE_ADDR_HIGH_0
#define SDP_RDMA_D_EW_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0x8060)
#define SDP_RDMA_D_EW_BASE_ADDR_HIGH_0_EW_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_EW_BASE_ADDR_HIGH_0_EW_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_EW_BASE_ADDR_HIGH_0_EW_BASE_ADDR_HIGH_SHIFT)


// Register SDP_RDMA_D_EW_LINE_STRIDE_0
#define SDP_RDMA_D_EW_LINE_STRIDE_0			_MK_ADDR_CONST(0x8064)
#define SDP_RDMA_D_EW_LINE_STRIDE_0_EW_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_EW_LINE_STRIDE_0_EW_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_EW_LINE_STRIDE_0_EW_LINE_STRIDE_SHIFT)


// Register SDP_RDMA_D_EW_SURFACE_STRIDE_0
#define SDP_RDMA_D_EW_SURFACE_STRIDE_0			_MK_ADDR_CONST(0x8068)
#define SDP_RDMA_D_EW_SURFACE_STRIDE_0_EW_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_EW_SURFACE_STRIDE_0_EW_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_EW_SURFACE_STRIDE_0_EW_SURFACE_STRIDE_SHIFT)


// Register SDP_RDMA_D_EW_BATCH_STRIDE_0
#define SDP_RDMA_D_EW_BATCH_STRIDE_0			_MK_ADDR_CONST(0x806c)
#define SDP_RDMA_D_EW_BATCH_STRIDE_0_EW_BATCH_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_EW_BATCH_STRIDE_0_EW_BATCH_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_EW_BATCH_STRIDE_0_EW_BATCH_STRIDE_SHIFT)


// Register SDP_RDMA_D_FEATURE_MODE_CFG_0
#define SDP_RDMA_D_FEATURE_MODE_CFG_0			_MK_ADDR_CONST(0x8070)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_FLYING_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_FLYING_MODE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_FEATURE_MODE_CFG_0_FLYING_MODE_SHIFT)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_FLYING_MODE_OFF			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_FLYING_MODE_ON			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_WINOGRAD_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_WINOGRAD_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_FEATURE_MODE_CFG_0_WINOGRAD_SHIFT)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_WINOGRAD_OFF			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_WINOGRAD_ON			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_IN_PRECISION_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_IN_PRECISION_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_D_FEATURE_MODE_CFG_0_IN_PRECISION_SHIFT)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_IN_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_IN_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_IN_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_D_FEATURE_MODE_CFG_0_PROC_PRECISION_SHIFT)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_OUT_PRECISION_SHIFT			_MK_SHIFT_CONST(6)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_OUT_PRECISION_FIELD			_MK_FIELD_CONST(0x3, SDP_RDMA_D_FEATURE_MODE_CFG_0_OUT_PRECISION_SHIFT)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_OUT_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_OUT_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_OUT_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_BATCH_NUMBER_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_RDMA_D_FEATURE_MODE_CFG_0_BATCH_NUMBER_FIELD			_MK_FIELD_CONST(0x1f, SDP_RDMA_D_FEATURE_MODE_CFG_0_BATCH_NUMBER_SHIFT)


// Register SDP_RDMA_D_SRC_DMA_CFG_0
#define SDP_RDMA_D_SRC_DMA_CFG_0			_MK_ADDR_CONST(0x8074)
#define SDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_SHIFT)
#define SDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_STATUS_NAN_INPUT_NUM_0
#define SDP_RDMA_D_STATUS_NAN_INPUT_NUM_0			_MK_ADDR_CONST(0x8078)
#define SDP_RDMA_D_STATUS_NAN_INPUT_NUM_0_STATUS_NAN_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_STATUS_NAN_INPUT_NUM_0_STATUS_NAN_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_STATUS_NAN_INPUT_NUM_0_STATUS_NAN_INPUT_NUM_SHIFT)


// Register SDP_RDMA_D_STATUS_INF_INPUT_NUM_0
#define SDP_RDMA_D_STATUS_INF_INPUT_NUM_0			_MK_ADDR_CONST(0x807c)
#define SDP_RDMA_D_STATUS_INF_INPUT_NUM_0_STATUS_INF_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_STATUS_INF_INPUT_NUM_0_STATUS_INF_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_STATUS_INF_INPUT_NUM_0_STATUS_INF_INPUT_NUM_SHIFT)


// Register SDP_RDMA_D_PERF_ENABLE_0
#define SDP_RDMA_D_PERF_ENABLE_0			_MK_ADDR_CONST(0x8080)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_PERF_ENABLE_0_PERF_DMA_EN_SHIFT)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_DMA_EN_NO			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_DMA_EN_YES			_MK_ENUM_CONST(0x1)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_RDMA_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_SHIFT)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_NO			_MK_ENUM_CONST(0x0)
#define SDP_RDMA_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_YES			_MK_ENUM_CONST(0x1)


// Register SDP_RDMA_D_PERF_MRDMA_READ_STALL_0
#define SDP_RDMA_D_PERF_MRDMA_READ_STALL_0			_MK_ADDR_CONST(0x8084)
#define SDP_RDMA_D_PERF_MRDMA_READ_STALL_0_MRDMA_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_PERF_MRDMA_READ_STALL_0_MRDMA_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_PERF_MRDMA_READ_STALL_0_MRDMA_STALL_SHIFT)


// Register SDP_RDMA_D_PERF_BRDMA_READ_STALL_0
#define SDP_RDMA_D_PERF_BRDMA_READ_STALL_0			_MK_ADDR_CONST(0x8088)
#define SDP_RDMA_D_PERF_BRDMA_READ_STALL_0_BRDMA_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_PERF_BRDMA_READ_STALL_0_BRDMA_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_PERF_BRDMA_READ_STALL_0_BRDMA_STALL_SHIFT)


// Register SDP_RDMA_D_PERF_NRDMA_READ_STALL_0
#define SDP_RDMA_D_PERF_NRDMA_READ_STALL_0			_MK_ADDR_CONST(0x808c)
#define SDP_RDMA_D_PERF_NRDMA_READ_STALL_0_NRDMA_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_PERF_NRDMA_READ_STALL_0_NRDMA_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_PERF_NRDMA_READ_STALL_0_NRDMA_STALL_SHIFT)


// Register SDP_RDMA_D_PERF_ERDMA_READ_STALL_0
#define SDP_RDMA_D_PERF_ERDMA_READ_STALL_0			_MK_ADDR_CONST(0x8090)
#define SDP_RDMA_D_PERF_ERDMA_READ_STALL_0_ERDMA_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_RDMA_D_PERF_ERDMA_READ_STALL_0_ERDMA_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_RDMA_D_PERF_ERDMA_READ_STALL_0_ERDMA_STALL_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register SDP_S_STATUS_0
#define SDP_S_STATUS_0			_MK_ADDR_CONST(0x9000)
#define SDP_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, SDP_S_STATUS_0_STATUS_0_SHIFT)
#define SDP_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define SDP_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define SDP_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define SDP_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, SDP_S_STATUS_0_STATUS_1_SHIFT)
#define SDP_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define SDP_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define SDP_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register SDP_S_POINTER_0
#define SDP_S_POINTER_0			_MK_ADDR_CONST(0x9004)
#define SDP_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, SDP_S_POINTER_0_PRODUCER_SHIFT)
#define SDP_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define SDP_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define SDP_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, SDP_S_POINTER_0_CONSUMER_SHIFT)
#define SDP_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define SDP_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register SDP_S_LUT_ACCESS_CFG_0
#define SDP_S_LUT_ACCESS_CFG_0			_MK_ADDR_CONST(0x9008)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_ADDR_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_ADDR_FIELD			_MK_FIELD_CONST(0x3ff, SDP_S_LUT_ACCESS_CFG_0_LUT_ADDR_SHIFT)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_FIELD			_MK_FIELD_CONST(0x1, SDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_SHIFT)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_LE			_MK_ENUM_CONST(0x0)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_LO			_MK_ENUM_CONST(0x1)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_SHIFT			_MK_SHIFT_CONST(17)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_FIELD			_MK_FIELD_CONST(0x1, SDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_SHIFT)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_READ			_MK_ENUM_CONST(0x0)
#define SDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_WRITE			_MK_ENUM_CONST(0x1)


// Register SDP_S_LUT_ACCESS_DATA_0
#define SDP_S_LUT_ACCESS_DATA_0			_MK_ADDR_CONST(0x900c)
#define SDP_S_LUT_ACCESS_DATA_0_LUT_DATA_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_ACCESS_DATA_0_LUT_DATA_FIELD			_MK_FIELD_CONST(0xffff, SDP_S_LUT_ACCESS_DATA_0_LUT_DATA_SHIFT)


// Register SDP_S_LUT_CFG_0
#define SDP_S_LUT_CFG_0			_MK_ADDR_CONST(0x9010)
#define SDP_S_LUT_CFG_0_LUT_LE_FUNCTION_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_CFG_0_LUT_LE_FUNCTION_FIELD			_MK_FIELD_CONST(0x1, SDP_S_LUT_CFG_0_LUT_LE_FUNCTION_SHIFT)
#define SDP_S_LUT_CFG_0_LUT_LE_FUNCTION_EXPONENT			_MK_ENUM_CONST(0x0)
#define SDP_S_LUT_CFG_0_LUT_LE_FUNCTION_LINEAR			_MK_ENUM_CONST(0x1)
#define SDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_FIELD			_MK_FIELD_CONST(0x1, SDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_SHIFT)
#define SDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_LE			_MK_ENUM_CONST(0x0)
#define SDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_LO			_MK_ENUM_CONST(0x1)
#define SDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_FIELD			_MK_FIELD_CONST(0x1, SDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_SHIFT)
#define SDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_LE			_MK_ENUM_CONST(0x0)
#define SDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_LO			_MK_ENUM_CONST(0x1)
#define SDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_SHIFT			_MK_SHIFT_CONST(6)
#define SDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_FIELD			_MK_FIELD_CONST(0x1, SDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_SHIFT)
#define SDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_LE			_MK_ENUM_CONST(0x0)
#define SDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_LO			_MK_ENUM_CONST(0x1)


// Register SDP_S_LUT_INFO_0
#define SDP_S_LUT_INFO_0			_MK_ADDR_CONST(0x9014)
#define SDP_S_LUT_INFO_0_LUT_LE_INDEX_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_INFO_0_LUT_LE_INDEX_OFFSET_FIELD			_MK_FIELD_CONST(0xff, SDP_S_LUT_INFO_0_LUT_LE_INDEX_OFFSET_SHIFT)
#define SDP_S_LUT_INFO_0_LUT_LE_INDEX_SELECT_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_S_LUT_INFO_0_LUT_LE_INDEX_SELECT_FIELD			_MK_FIELD_CONST(0xff, SDP_S_LUT_INFO_0_LUT_LE_INDEX_SELECT_SHIFT)
#define SDP_S_LUT_INFO_0_LUT_LO_INDEX_SELECT_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_S_LUT_INFO_0_LUT_LO_INDEX_SELECT_FIELD			_MK_FIELD_CONST(0xff, SDP_S_LUT_INFO_0_LUT_LO_INDEX_SELECT_SHIFT)


// Register SDP_S_LUT_LE_START_0
#define SDP_S_LUT_LE_START_0			_MK_ADDR_CONST(0x9018)
#define SDP_S_LUT_LE_START_0_LUT_LE_START_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LE_START_0_LUT_LE_START_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_S_LUT_LE_START_0_LUT_LE_START_SHIFT)


// Register SDP_S_LUT_LE_END_0
#define SDP_S_LUT_LE_END_0			_MK_ADDR_CONST(0x901c)
#define SDP_S_LUT_LE_END_0_LUT_LE_END_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LE_END_0_LUT_LE_END_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_S_LUT_LE_END_0_LUT_LE_END_SHIFT)


// Register SDP_S_LUT_LO_START_0
#define SDP_S_LUT_LO_START_0			_MK_ADDR_CONST(0x9020)
#define SDP_S_LUT_LO_START_0_LUT_LO_START_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LO_START_0_LUT_LO_START_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_S_LUT_LO_START_0_LUT_LO_START_SHIFT)


// Register SDP_S_LUT_LO_END_0
#define SDP_S_LUT_LO_END_0			_MK_ADDR_CONST(0x9024)
#define SDP_S_LUT_LO_END_0_LUT_LO_END_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LO_END_0_LUT_LO_END_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_S_LUT_LO_END_0_LUT_LO_END_SHIFT)


// Register SDP_S_LUT_LE_SLOPE_SCALE_0
#define SDP_S_LUT_LE_SLOPE_SCALE_0			_MK_ADDR_CONST(0x9028)
#define SDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_UFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_UFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_UFLOW_SCALE_SHIFT)
#define SDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_OFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_OFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_OFLOW_SCALE_SHIFT)


// Register SDP_S_LUT_LE_SLOPE_SHIFT_0
#define SDP_S_LUT_LE_SLOPE_SHIFT_0			_MK_ADDR_CONST(0x902c)
#define SDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_UFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_UFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, SDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_UFLOW_SHIFT_SHIFT)
#define SDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_OFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_OFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, SDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_OFLOW_SHIFT_SHIFT)


// Register SDP_S_LUT_LO_SLOPE_SCALE_0
#define SDP_S_LUT_LO_SLOPE_SCALE_0			_MK_ADDR_CONST(0x9030)
#define SDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_UFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_UFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_UFLOW_SCALE_SHIFT)
#define SDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_OFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(16)
#define SDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_OFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_OFLOW_SCALE_SHIFT)


// Register SDP_S_LUT_LO_SLOPE_SHIFT_0
#define SDP_S_LUT_LO_SLOPE_SHIFT_0			_MK_ADDR_CONST(0x9034)
#define SDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_UFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_UFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, SDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_UFLOW_SHIFT_SHIFT)
#define SDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_OFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_OFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, SDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_OFLOW_SHIFT_SHIFT)


// Register SDP_D_OP_ENABLE_0
#define SDP_D_OP_ENABLE_0			_MK_ADDR_CONST(0x9038)
#define SDP_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_D_OP_ENABLE_0_OP_EN_SHIFT)
#define SDP_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define SDP_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register SDP_D_DATA_CUBE_WIDTH_0
#define SDP_D_DATA_CUBE_WIDTH_0			_MK_ADDR_CONST(0x903c)
#define SDP_D_DATA_CUBE_WIDTH_0_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DATA_CUBE_WIDTH_0_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, SDP_D_DATA_CUBE_WIDTH_0_WIDTH_SHIFT)


// Register SDP_D_DATA_CUBE_HEIGHT_0
#define SDP_D_DATA_CUBE_HEIGHT_0			_MK_ADDR_CONST(0x9040)
#define SDP_D_DATA_CUBE_HEIGHT_0_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DATA_CUBE_HEIGHT_0_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, SDP_D_DATA_CUBE_HEIGHT_0_HEIGHT_SHIFT)


// Register SDP_D_DATA_CUBE_CHANNEL_0
#define SDP_D_DATA_CUBE_CHANNEL_0			_MK_ADDR_CONST(0x9044)
#define SDP_D_DATA_CUBE_CHANNEL_0_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DATA_CUBE_CHANNEL_0_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, SDP_D_DATA_CUBE_CHANNEL_0_CHANNEL_SHIFT)


// Register SDP_D_DST_BASE_ADDR_LOW_0
#define SDP_D_DST_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0x9048)
#define SDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_SHIFT)


// Register SDP_D_DST_BASE_ADDR_HIGH_0
#define SDP_D_DST_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0x904c)
#define SDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_SHIFT)


// Register SDP_D_DST_LINE_STRIDE_0
#define SDP_D_DST_LINE_STRIDE_0			_MK_ADDR_CONST(0x9050)
#define SDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_SHIFT)


// Register SDP_D_DST_SURFACE_STRIDE_0
#define SDP_D_DST_SURFACE_STRIDE_0			_MK_ADDR_CONST(0x9054)
#define SDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_SHIFT)


// Register SDP_D_DP_BS_CFG_0
#define SDP_D_DP_BS_CFG_0			_MK_ADDR_CONST(0x9058)
#define SDP_D_DP_BS_CFG_0_BS_BYPASS_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BS_CFG_0_BS_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_CFG_0_BS_BYPASS_SHIFT)
#define SDP_D_DP_BS_CFG_0_BS_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_CFG_0_BS_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_CFG_0_BS_ALU_BYPASS_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_DP_BS_CFG_0_BS_ALU_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_CFG_0_BS_ALU_BYPASS_SHIFT)
#define SDP_D_DP_BS_CFG_0_BS_ALU_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_CFG_0_BS_ALU_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_CFG_0_BS_ALU_ALGO_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_D_DP_BS_CFG_0_BS_ALU_ALGO_FIELD			_MK_FIELD_CONST(0x3, SDP_D_DP_BS_CFG_0_BS_ALU_ALGO_SHIFT)
#define SDP_D_DP_BS_CFG_0_BS_ALU_ALGO_MAX			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_CFG_0_BS_ALU_ALGO_MIN			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_CFG_0_BS_ALU_ALGO_SUM			_MK_ENUM_CONST(0x2)
#define SDP_D_DP_BS_CFG_0_BS_MUL_BYPASS_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_D_DP_BS_CFG_0_BS_MUL_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_CFG_0_BS_MUL_BYPASS_SHIFT)
#define SDP_D_DP_BS_CFG_0_BS_MUL_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_CFG_0_BS_MUL_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_CFG_0_BS_MUL_PRELU_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_D_DP_BS_CFG_0_BS_MUL_PRELU_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_CFG_0_BS_MUL_PRELU_SHIFT)
#define SDP_D_DP_BS_CFG_0_BS_MUL_PRELU_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_CFG_0_BS_MUL_PRELU_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_CFG_0_BS_RELU_BYPASS_SHIFT			_MK_SHIFT_CONST(6)
#define SDP_D_DP_BS_CFG_0_BS_RELU_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_CFG_0_BS_RELU_BYPASS_SHIFT)
#define SDP_D_DP_BS_CFG_0_BS_RELU_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_CFG_0_BS_RELU_BYPASS_YES			_MK_ENUM_CONST(0x1)


// Register SDP_D_DP_BS_ALU_CFG_0
#define SDP_D_DP_BS_ALU_CFG_0			_MK_ADDR_CONST(0x905c)
#define SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SRC_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SRC_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SRC_SHIFT)
#define SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SRC_REG			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SRC_MEM			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SHIFT_VALUE_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SHIFT_VALUE_FIELD			_MK_FIELD_CONST(0x3f, SDP_D_DP_BS_ALU_CFG_0_BS_ALU_SHIFT_VALUE_SHIFT)


// Register SDP_D_DP_BS_ALU_SRC_VALUE_0
#define SDP_D_DP_BS_ALU_SRC_VALUE_0			_MK_ADDR_CONST(0x9060)
#define SDP_D_DP_BS_ALU_SRC_VALUE_0_BS_ALU_OPERAND_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BS_ALU_SRC_VALUE_0_BS_ALU_OPERAND_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_DP_BS_ALU_SRC_VALUE_0_BS_ALU_OPERAND_SHIFT)


// Register SDP_D_DP_BS_MUL_CFG_0
#define SDP_D_DP_BS_MUL_CFG_0			_MK_ADDR_CONST(0x9064)
#define SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SRC_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SRC_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SRC_SHIFT)
#define SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SRC_REG			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SRC_MEM			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SHIFT_VALUE_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SHIFT_VALUE_FIELD			_MK_FIELD_CONST(0xff, SDP_D_DP_BS_MUL_CFG_0_BS_MUL_SHIFT_VALUE_SHIFT)


// Register SDP_D_DP_BS_MUL_SRC_VALUE_0
#define SDP_D_DP_BS_MUL_SRC_VALUE_0			_MK_ADDR_CONST(0x9068)
#define SDP_D_DP_BS_MUL_SRC_VALUE_0_BS_MUL_OPERAND_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BS_MUL_SRC_VALUE_0_BS_MUL_OPERAND_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_DP_BS_MUL_SRC_VALUE_0_BS_MUL_OPERAND_SHIFT)


// Register SDP_D_DP_BN_CFG_0
#define SDP_D_DP_BN_CFG_0			_MK_ADDR_CONST(0x906c)
#define SDP_D_DP_BN_CFG_0_BN_BYPASS_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BN_CFG_0_BN_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_CFG_0_BN_BYPASS_SHIFT)
#define SDP_D_DP_BN_CFG_0_BN_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_CFG_0_BN_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_CFG_0_BN_ALU_BYPASS_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_DP_BN_CFG_0_BN_ALU_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_CFG_0_BN_ALU_BYPASS_SHIFT)
#define SDP_D_DP_BN_CFG_0_BN_ALU_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_CFG_0_BN_ALU_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_CFG_0_BN_ALU_ALGO_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_D_DP_BN_CFG_0_BN_ALU_ALGO_FIELD			_MK_FIELD_CONST(0x3, SDP_D_DP_BN_CFG_0_BN_ALU_ALGO_SHIFT)
#define SDP_D_DP_BN_CFG_0_BN_ALU_ALGO_MAX			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_CFG_0_BN_ALU_ALGO_MIN			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_CFG_0_BN_ALU_ALGO_SUM			_MK_ENUM_CONST(0x2)
#define SDP_D_DP_BN_CFG_0_BN_MUL_BYPASS_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_D_DP_BN_CFG_0_BN_MUL_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_CFG_0_BN_MUL_BYPASS_SHIFT)
#define SDP_D_DP_BN_CFG_0_BN_MUL_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_CFG_0_BN_MUL_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_CFG_0_BN_MUL_PRELU_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_D_DP_BN_CFG_0_BN_MUL_PRELU_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_CFG_0_BN_MUL_PRELU_SHIFT)
#define SDP_D_DP_BN_CFG_0_BN_MUL_PRELU_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_CFG_0_BN_MUL_PRELU_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_CFG_0_BN_RELU_BYPASS_SHIFT			_MK_SHIFT_CONST(6)
#define SDP_D_DP_BN_CFG_0_BN_RELU_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_CFG_0_BN_RELU_BYPASS_SHIFT)
#define SDP_D_DP_BN_CFG_0_BN_RELU_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_CFG_0_BN_RELU_BYPASS_YES			_MK_ENUM_CONST(0x1)


// Register SDP_D_DP_BN_ALU_CFG_0
#define SDP_D_DP_BN_ALU_CFG_0			_MK_ADDR_CONST(0x9070)
#define SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SRC_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SRC_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SRC_SHIFT)
#define SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SRC_REG			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SRC_MEM			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SHIFT_VALUE_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SHIFT_VALUE_FIELD			_MK_FIELD_CONST(0x3f, SDP_D_DP_BN_ALU_CFG_0_BN_ALU_SHIFT_VALUE_SHIFT)


// Register SDP_D_DP_BN_ALU_SRC_VALUE_0
#define SDP_D_DP_BN_ALU_SRC_VALUE_0			_MK_ADDR_CONST(0x9074)
#define SDP_D_DP_BN_ALU_SRC_VALUE_0_BN_ALU_OPERAND_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BN_ALU_SRC_VALUE_0_BN_ALU_OPERAND_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_DP_BN_ALU_SRC_VALUE_0_BN_ALU_OPERAND_SHIFT)


// Register SDP_D_DP_BN_MUL_CFG_0
#define SDP_D_DP_BN_MUL_CFG_0			_MK_ADDR_CONST(0x9078)
#define SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SRC_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SRC_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SRC_SHIFT)
#define SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SRC_REG			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SRC_MEM			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SHIFT_VALUE_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SHIFT_VALUE_FIELD			_MK_FIELD_CONST(0xff, SDP_D_DP_BN_MUL_CFG_0_BN_MUL_SHIFT_VALUE_SHIFT)


// Register SDP_D_DP_BN_MUL_SRC_VALUE_0
#define SDP_D_DP_BN_MUL_SRC_VALUE_0			_MK_ADDR_CONST(0x907c)
#define SDP_D_DP_BN_MUL_SRC_VALUE_0_BN_MUL_OPERAND_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_BN_MUL_SRC_VALUE_0_BN_MUL_OPERAND_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_DP_BN_MUL_SRC_VALUE_0_BN_MUL_OPERAND_SHIFT)


// Register SDP_D_DP_EW_CFG_0
#define SDP_D_DP_EW_CFG_0			_MK_ADDR_CONST(0x9080)
#define SDP_D_DP_EW_CFG_0_EW_BYPASS_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_CFG_0_EW_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_CFG_0_EW_BYPASS_SHIFT)
#define SDP_D_DP_EW_CFG_0_EW_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_CFG_0_EW_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_CFG_0_EW_ALU_BYPASS_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_DP_EW_CFG_0_EW_ALU_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_CFG_0_EW_ALU_BYPASS_SHIFT)
#define SDP_D_DP_EW_CFG_0_EW_ALU_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_CFG_0_EW_ALU_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_FIELD			_MK_FIELD_CONST(0x3, SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_SHIFT)
#define SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_MAX			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_MIN			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_SUM			_MK_ENUM_CONST(0x2)
#define SDP_D_DP_EW_CFG_0_EW_ALU_ALGO_EQL			_MK_ENUM_CONST(0x3)
#define SDP_D_DP_EW_CFG_0_EW_MUL_BYPASS_SHIFT			_MK_SHIFT_CONST(4)
#define SDP_D_DP_EW_CFG_0_EW_MUL_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_CFG_0_EW_MUL_BYPASS_SHIFT)
#define SDP_D_DP_EW_CFG_0_EW_MUL_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_CFG_0_EW_MUL_BYPASS_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_CFG_0_EW_MUL_PRELU_SHIFT			_MK_SHIFT_CONST(5)
#define SDP_D_DP_EW_CFG_0_EW_MUL_PRELU_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_CFG_0_EW_MUL_PRELU_SHIFT)
#define SDP_D_DP_EW_CFG_0_EW_MUL_PRELU_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_CFG_0_EW_MUL_PRELU_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_CFG_0_EW_LUT_BYPASS_SHIFT			_MK_SHIFT_CONST(6)
#define SDP_D_DP_EW_CFG_0_EW_LUT_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_CFG_0_EW_LUT_BYPASS_SHIFT)
#define SDP_D_DP_EW_CFG_0_EW_LUT_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_CFG_0_EW_LUT_BYPASS_YES			_MK_ENUM_CONST(0x1)


// Register SDP_D_DP_EW_ALU_CFG_0
#define SDP_D_DP_EW_ALU_CFG_0			_MK_ADDR_CONST(0x9084)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_SRC_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_SRC_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_ALU_CFG_0_EW_ALU_SRC_SHIFT)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_SRC_REG			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_SRC_MEM			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_CVT_BYPASS_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_CVT_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_ALU_CFG_0_EW_ALU_CVT_BYPASS_SHIFT)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_CVT_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_ALU_CFG_0_EW_ALU_CVT_BYPASS_YES			_MK_ENUM_CONST(0x1)


// Register SDP_D_DP_EW_ALU_SRC_VALUE_0
#define SDP_D_DP_EW_ALU_SRC_VALUE_0			_MK_ADDR_CONST(0x9088)
#define SDP_D_DP_EW_ALU_SRC_VALUE_0_EW_ALU_OPERAND_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_ALU_SRC_VALUE_0_EW_ALU_OPERAND_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DP_EW_ALU_SRC_VALUE_0_EW_ALU_OPERAND_SHIFT)


// Register SDP_D_DP_EW_ALU_CVT_OFFSET_VALUE_0
#define SDP_D_DP_EW_ALU_CVT_OFFSET_VALUE_0			_MK_ADDR_CONST(0x908c)
#define SDP_D_DP_EW_ALU_CVT_OFFSET_VALUE_0_EW_ALU_CVT_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_ALU_CVT_OFFSET_VALUE_0_EW_ALU_CVT_OFFSET_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DP_EW_ALU_CVT_OFFSET_VALUE_0_EW_ALU_CVT_OFFSET_SHIFT)


// Register SDP_D_DP_EW_ALU_CVT_SCALE_VALUE_0
#define SDP_D_DP_EW_ALU_CVT_SCALE_VALUE_0			_MK_ADDR_CONST(0x9090)
#define SDP_D_DP_EW_ALU_CVT_SCALE_VALUE_0_EW_ALU_CVT_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_ALU_CVT_SCALE_VALUE_0_EW_ALU_CVT_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_DP_EW_ALU_CVT_SCALE_VALUE_0_EW_ALU_CVT_SCALE_SHIFT)


// Register SDP_D_DP_EW_ALU_CVT_TRUNCATE_VALUE_0
#define SDP_D_DP_EW_ALU_CVT_TRUNCATE_VALUE_0			_MK_ADDR_CONST(0x9094)
#define SDP_D_DP_EW_ALU_CVT_TRUNCATE_VALUE_0_EW_ALU_CVT_TRUNCATE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_ALU_CVT_TRUNCATE_VALUE_0_EW_ALU_CVT_TRUNCATE_FIELD			_MK_FIELD_CONST(0x3f, SDP_D_DP_EW_ALU_CVT_TRUNCATE_VALUE_0_EW_ALU_CVT_TRUNCATE_SHIFT)


// Register SDP_D_DP_EW_MUL_CFG_0
#define SDP_D_DP_EW_MUL_CFG_0			_MK_ADDR_CONST(0x9098)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_SRC_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_SRC_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_MUL_CFG_0_EW_MUL_SRC_SHIFT)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_SRC_REG			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_SRC_MEM			_MK_ENUM_CONST(0x1)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_CVT_BYPASS_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_CVT_BYPASS_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DP_EW_MUL_CFG_0_EW_MUL_CVT_BYPASS_SHIFT)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_CVT_BYPASS_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_DP_EW_MUL_CFG_0_EW_MUL_CVT_BYPASS_YES			_MK_ENUM_CONST(0x1)


// Register SDP_D_DP_EW_MUL_SRC_VALUE_0
#define SDP_D_DP_EW_MUL_SRC_VALUE_0			_MK_ADDR_CONST(0x909c)
#define SDP_D_DP_EW_MUL_SRC_VALUE_0_EW_MUL_OPERAND_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_MUL_SRC_VALUE_0_EW_MUL_OPERAND_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DP_EW_MUL_SRC_VALUE_0_EW_MUL_OPERAND_SHIFT)


// Register SDP_D_DP_EW_MUL_CVT_OFFSET_VALUE_0
#define SDP_D_DP_EW_MUL_CVT_OFFSET_VALUE_0			_MK_ADDR_CONST(0x90a0)
#define SDP_D_DP_EW_MUL_CVT_OFFSET_VALUE_0_EW_MUL_CVT_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_MUL_CVT_OFFSET_VALUE_0_EW_MUL_CVT_OFFSET_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DP_EW_MUL_CVT_OFFSET_VALUE_0_EW_MUL_CVT_OFFSET_SHIFT)


// Register SDP_D_DP_EW_MUL_CVT_SCALE_VALUE_0
#define SDP_D_DP_EW_MUL_CVT_SCALE_VALUE_0			_MK_ADDR_CONST(0x90a4)
#define SDP_D_DP_EW_MUL_CVT_SCALE_VALUE_0_EW_MUL_CVT_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_MUL_CVT_SCALE_VALUE_0_EW_MUL_CVT_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_DP_EW_MUL_CVT_SCALE_VALUE_0_EW_MUL_CVT_SCALE_SHIFT)


// Register SDP_D_DP_EW_MUL_CVT_TRUNCATE_VALUE_0
#define SDP_D_DP_EW_MUL_CVT_TRUNCATE_VALUE_0			_MK_ADDR_CONST(0x90a8)
#define SDP_D_DP_EW_MUL_CVT_TRUNCATE_VALUE_0_EW_MUL_CVT_TRUNCATE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_MUL_CVT_TRUNCATE_VALUE_0_EW_MUL_CVT_TRUNCATE_FIELD			_MK_FIELD_CONST(0x3f, SDP_D_DP_EW_MUL_CVT_TRUNCATE_VALUE_0_EW_MUL_CVT_TRUNCATE_SHIFT)


// Register SDP_D_DP_EW_TRUNCATE_VALUE_0
#define SDP_D_DP_EW_TRUNCATE_VALUE_0			_MK_ADDR_CONST(0x90ac)
#define SDP_D_DP_EW_TRUNCATE_VALUE_0_EW_TRUNCATE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DP_EW_TRUNCATE_VALUE_0_EW_TRUNCATE_FIELD			_MK_FIELD_CONST(0x3ff, SDP_D_DP_EW_TRUNCATE_VALUE_0_EW_TRUNCATE_SHIFT)


// Register SDP_D_FEATURE_MODE_CFG_0
#define SDP_D_FEATURE_MODE_CFG_0			_MK_ADDR_CONST(0x90b0)
#define SDP_D_FEATURE_MODE_CFG_0_FLYING_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_FEATURE_MODE_CFG_0_FLYING_MODE_FIELD			_MK_FIELD_CONST(0x1, SDP_D_FEATURE_MODE_CFG_0_FLYING_MODE_SHIFT)
#define SDP_D_FEATURE_MODE_CFG_0_FLYING_MODE_OFF			_MK_ENUM_CONST(0x0)
#define SDP_D_FEATURE_MODE_CFG_0_FLYING_MODE_ON			_MK_ENUM_CONST(0x1)
#define SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_FIELD			_MK_FIELD_CONST(0x1, SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_SHIFT)
#define SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_MEM			_MK_ENUM_CONST(0x0)
#define SDP_D_FEATURE_MODE_CFG_0_OUTPUT_DST_PDP			_MK_ENUM_CONST(0x1)
#define SDP_D_FEATURE_MODE_CFG_0_WINOGRAD_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_D_FEATURE_MODE_CFG_0_WINOGRAD_FIELD			_MK_FIELD_CONST(0x1, SDP_D_FEATURE_MODE_CFG_0_WINOGRAD_SHIFT)
#define SDP_D_FEATURE_MODE_CFG_0_WINOGRAD_OFF			_MK_ENUM_CONST(0x0)
#define SDP_D_FEATURE_MODE_CFG_0_WINOGRAD_ON			_MK_ENUM_CONST(0x1)
#define SDP_D_FEATURE_MODE_CFG_0_NAN_TO_ZERO_SHIFT			_MK_SHIFT_CONST(3)
#define SDP_D_FEATURE_MODE_CFG_0_NAN_TO_ZERO_FIELD			_MK_FIELD_CONST(0x1, SDP_D_FEATURE_MODE_CFG_0_NAN_TO_ZERO_SHIFT)
#define SDP_D_FEATURE_MODE_CFG_0_NAN_TO_ZERO_DISABLE			_MK_ENUM_CONST(0x0)
#define SDP_D_FEATURE_MODE_CFG_0_NAN_TO_ZERO_ENABLE			_MK_ENUM_CONST(0x1)
#define SDP_D_FEATURE_MODE_CFG_0_BATCH_NUMBER_SHIFT			_MK_SHIFT_CONST(8)
#define SDP_D_FEATURE_MODE_CFG_0_BATCH_NUMBER_FIELD			_MK_FIELD_CONST(0x1f, SDP_D_FEATURE_MODE_CFG_0_BATCH_NUMBER_SHIFT)


// Register SDP_D_DST_DMA_CFG_0
#define SDP_D_DST_DMA_CFG_0			_MK_ADDR_CONST(0x90b4)
#define SDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, SDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_SHIFT)
#define SDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define SDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register SDP_D_DST_BATCH_STRIDE_0
#define SDP_D_DST_BATCH_STRIDE_0			_MK_ADDR_CONST(0x90b8)
#define SDP_D_DST_BATCH_STRIDE_0_DST_BATCH_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DST_BATCH_STRIDE_0_DST_BATCH_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_DST_BATCH_STRIDE_0_DST_BATCH_STRIDE_SHIFT)


// Register SDP_D_DATA_FORMAT_0
#define SDP_D_DATA_FORMAT_0			_MK_ADDR_CONST(0x90bc)
#define SDP_D_DATA_FORMAT_0_PROC_PRECISION_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_DATA_FORMAT_0_PROC_PRECISION_FIELD			_MK_FIELD_CONST(0x3, SDP_D_DATA_FORMAT_0_PROC_PRECISION_SHIFT)
#define SDP_D_DATA_FORMAT_0_PROC_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define SDP_D_DATA_FORMAT_0_PROC_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define SDP_D_DATA_FORMAT_0_PROC_PRECISION_FP16			_MK_ENUM_CONST(0x2)
#define SDP_D_DATA_FORMAT_0_OUT_PRECISION_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_D_DATA_FORMAT_0_OUT_PRECISION_FIELD			_MK_FIELD_CONST(0x3, SDP_D_DATA_FORMAT_0_OUT_PRECISION_SHIFT)
#define SDP_D_DATA_FORMAT_0_OUT_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define SDP_D_DATA_FORMAT_0_OUT_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define SDP_D_DATA_FORMAT_0_OUT_PRECISION_FP16			_MK_ENUM_CONST(0x2)


// Register SDP_D_CVT_OFFSET_0
#define SDP_D_CVT_OFFSET_0			_MK_ADDR_CONST(0x90c0)
#define SDP_D_CVT_OFFSET_0_CVT_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_CVT_OFFSET_0_CVT_OFFSET_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_CVT_OFFSET_0_CVT_OFFSET_SHIFT)


// Register SDP_D_CVT_SCALE_0
#define SDP_D_CVT_SCALE_0			_MK_ADDR_CONST(0x90c4)
#define SDP_D_CVT_SCALE_0_CVT_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_CVT_SCALE_0_CVT_SCALE_FIELD			_MK_FIELD_CONST(0xffff, SDP_D_CVT_SCALE_0_CVT_SCALE_SHIFT)


// Register SDP_D_CVT_SHIFT_0
#define SDP_D_CVT_SHIFT_0			_MK_ADDR_CONST(0x90c8)
#define SDP_D_CVT_SHIFT_0_CVT_SHIFT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_CVT_SHIFT_0_CVT_SHIFT_FIELD			_MK_FIELD_CONST(0x3f, SDP_D_CVT_SHIFT_0_CVT_SHIFT_SHIFT)


// Register SDP_D_STATUS_0
#define SDP_D_STATUS_0			_MK_ADDR_CONST(0x90cc)
#define SDP_D_STATUS_0_STATUS_UNEQUAL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_STATUS_0_STATUS_UNEQUAL_FIELD			_MK_FIELD_CONST(0x1, SDP_D_STATUS_0_STATUS_UNEQUAL_SHIFT)


// Register SDP_D_STATUS_NAN_INPUT_NUM_0
#define SDP_D_STATUS_NAN_INPUT_NUM_0			_MK_ADDR_CONST(0x90d0)
#define SDP_D_STATUS_NAN_INPUT_NUM_0_STATUS_NAN_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_STATUS_NAN_INPUT_NUM_0_STATUS_NAN_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_STATUS_NAN_INPUT_NUM_0_STATUS_NAN_INPUT_NUM_SHIFT)


// Register SDP_D_STATUS_INF_INPUT_NUM_0
#define SDP_D_STATUS_INF_INPUT_NUM_0			_MK_ADDR_CONST(0x90d4)
#define SDP_D_STATUS_INF_INPUT_NUM_0_STATUS_INF_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_STATUS_INF_INPUT_NUM_0_STATUS_INF_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_STATUS_INF_INPUT_NUM_0_STATUS_INF_INPUT_NUM_SHIFT)


// Register SDP_D_STATUS_NAN_OUTPUT_NUM_0
#define SDP_D_STATUS_NAN_OUTPUT_NUM_0			_MK_ADDR_CONST(0x90d8)
#define SDP_D_STATUS_NAN_OUTPUT_NUM_0_STATUS_NAN_OUTPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_STATUS_NAN_OUTPUT_NUM_0_STATUS_NAN_OUTPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_STATUS_NAN_OUTPUT_NUM_0_STATUS_NAN_OUTPUT_NUM_SHIFT)


// Register SDP_D_PERF_ENABLE_0
#define SDP_D_PERF_ENABLE_0			_MK_ADDR_CONST(0x90dc)
#define SDP_D_PERF_ENABLE_0_PERF_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_ENABLE_0_PERF_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_D_PERF_ENABLE_0_PERF_DMA_EN_SHIFT)
#define SDP_D_PERF_ENABLE_0_PERF_DMA_EN_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_PERF_ENABLE_0_PERF_DMA_EN_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_PERF_ENABLE_0_PERF_LUT_EN_SHIFT			_MK_SHIFT_CONST(1)
#define SDP_D_PERF_ENABLE_0_PERF_LUT_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_D_PERF_ENABLE_0_PERF_LUT_EN_SHIFT)
#define SDP_D_PERF_ENABLE_0_PERF_LUT_EN_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_PERF_ENABLE_0_PERF_LUT_EN_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_PERF_ENABLE_0_PERF_SAT_EN_SHIFT			_MK_SHIFT_CONST(2)
#define SDP_D_PERF_ENABLE_0_PERF_SAT_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_D_PERF_ENABLE_0_PERF_SAT_EN_SHIFT)
#define SDP_D_PERF_ENABLE_0_PERF_SAT_EN_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_PERF_ENABLE_0_PERF_SAT_EN_YES			_MK_ENUM_CONST(0x1)
#define SDP_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_SHIFT			_MK_SHIFT_CONST(3)
#define SDP_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_FIELD			_MK_FIELD_CONST(0x1, SDP_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_SHIFT)
#define SDP_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_NO			_MK_ENUM_CONST(0x0)
#define SDP_D_PERF_ENABLE_0_PERF_NAN_INF_COUNT_EN_YES			_MK_ENUM_CONST(0x1)


// Register SDP_D_PERF_WDMA_WRITE_STALL_0
#define SDP_D_PERF_WDMA_WRITE_STALL_0			_MK_ADDR_CONST(0x90e0)
#define SDP_D_PERF_WDMA_WRITE_STALL_0_WDMA_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_WDMA_WRITE_STALL_0_WDMA_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_WDMA_WRITE_STALL_0_WDMA_STALL_SHIFT)


// Register SDP_D_PERF_LUT_UFLOW_0
#define SDP_D_PERF_LUT_UFLOW_0			_MK_ADDR_CONST(0x90e4)
#define SDP_D_PERF_LUT_UFLOW_0_LUT_UFLOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_LUT_UFLOW_0_LUT_UFLOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_LUT_UFLOW_0_LUT_UFLOW_SHIFT)


// Register SDP_D_PERF_LUT_OFLOW_0
#define SDP_D_PERF_LUT_OFLOW_0			_MK_ADDR_CONST(0x90e8)
#define SDP_D_PERF_LUT_OFLOW_0_LUT_OFLOW_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_LUT_OFLOW_0_LUT_OFLOW_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_LUT_OFLOW_0_LUT_OFLOW_SHIFT)


// Register SDP_D_PERF_OUT_SATURATION_0
#define SDP_D_PERF_OUT_SATURATION_0			_MK_ADDR_CONST(0x90ec)
#define SDP_D_PERF_OUT_SATURATION_0_OUT_SATURATION_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_OUT_SATURATION_0_OUT_SATURATION_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_OUT_SATURATION_0_OUT_SATURATION_SHIFT)


// Register SDP_D_PERF_LUT_HYBRID_0
#define SDP_D_PERF_LUT_HYBRID_0			_MK_ADDR_CONST(0x90f0)
#define SDP_D_PERF_LUT_HYBRID_0_LUT_HYBRID_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_LUT_HYBRID_0_LUT_HYBRID_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_LUT_HYBRID_0_LUT_HYBRID_SHIFT)


// Register SDP_D_PERF_LUT_LE_HIT_0
#define SDP_D_PERF_LUT_LE_HIT_0			_MK_ADDR_CONST(0x90f4)
#define SDP_D_PERF_LUT_LE_HIT_0_LUT_LE_HIT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_LUT_LE_HIT_0_LUT_LE_HIT_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_LUT_LE_HIT_0_LUT_LE_HIT_SHIFT)


// Register SDP_D_PERF_LUT_LO_HIT_0
#define SDP_D_PERF_LUT_LO_HIT_0			_MK_ADDR_CONST(0x90f8)
#define SDP_D_PERF_LUT_LO_HIT_0_LUT_LO_HIT_SHIFT			_MK_SHIFT_CONST(0)
#define SDP_D_PERF_LUT_LO_HIT_0_LUT_LO_HIT_FIELD			_MK_FIELD_CONST(0xffffffff, SDP_D_PERF_LUT_LO_HIT_0_LUT_LO_HIT_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register PDP_RDMA_S_STATUS_0
#define PDP_RDMA_S_STATUS_0			_MK_ADDR_CONST(0xa000)
#define PDP_RDMA_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, PDP_RDMA_S_STATUS_0_STATUS_0_SHIFT)
#define PDP_RDMA_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define PDP_RDMA_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define PDP_RDMA_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define PDP_RDMA_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, PDP_RDMA_S_STATUS_0_STATUS_1_SHIFT)
#define PDP_RDMA_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define PDP_RDMA_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register PDP_RDMA_S_POINTER_0
#define PDP_RDMA_S_POINTER_0			_MK_ADDR_CONST(0xa004)
#define PDP_RDMA_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, PDP_RDMA_S_POINTER_0_PRODUCER_SHIFT)
#define PDP_RDMA_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define PDP_RDMA_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define PDP_RDMA_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, PDP_RDMA_S_POINTER_0_CONSUMER_SHIFT)
#define PDP_RDMA_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register PDP_RDMA_D_OP_ENABLE_0
#define PDP_RDMA_D_OP_ENABLE_0			_MK_ADDR_CONST(0xa008)
#define PDP_RDMA_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, PDP_RDMA_D_OP_ENABLE_0_OP_EN_SHIFT)
#define PDP_RDMA_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register PDP_RDMA_D_DATA_CUBE_IN_WIDTH_0
#define PDP_RDMA_D_DATA_CUBE_IN_WIDTH_0			_MK_ADDR_CONST(0xa00c)
#define PDP_RDMA_D_DATA_CUBE_IN_WIDTH_0_CUBE_IN_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_DATA_CUBE_IN_WIDTH_0_CUBE_IN_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, PDP_RDMA_D_DATA_CUBE_IN_WIDTH_0_CUBE_IN_WIDTH_SHIFT)


// Register PDP_RDMA_D_DATA_CUBE_IN_HEIGHT_0
#define PDP_RDMA_D_DATA_CUBE_IN_HEIGHT_0			_MK_ADDR_CONST(0xa010)
#define PDP_RDMA_D_DATA_CUBE_IN_HEIGHT_0_CUBE_IN_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_DATA_CUBE_IN_HEIGHT_0_CUBE_IN_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, PDP_RDMA_D_DATA_CUBE_IN_HEIGHT_0_CUBE_IN_HEIGHT_SHIFT)


// Register PDP_RDMA_D_DATA_CUBE_IN_CHANNEL_0
#define PDP_RDMA_D_DATA_CUBE_IN_CHANNEL_0			_MK_ADDR_CONST(0xa014)
#define PDP_RDMA_D_DATA_CUBE_IN_CHANNEL_0_CUBE_IN_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_DATA_CUBE_IN_CHANNEL_0_CUBE_IN_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, PDP_RDMA_D_DATA_CUBE_IN_CHANNEL_0_CUBE_IN_CHANNEL_SHIFT)


// Register PDP_RDMA_D_FLYING_MODE_0
#define PDP_RDMA_D_FLYING_MODE_0			_MK_ADDR_CONST(0xa018)
#define PDP_RDMA_D_FLYING_MODE_0_FLYING_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_FLYING_MODE_0_FLYING_MODE_FIELD			_MK_FIELD_CONST(0x1, PDP_RDMA_D_FLYING_MODE_0_FLYING_MODE_SHIFT)
#define PDP_RDMA_D_FLYING_MODE_0_FLYING_MODE_ON_FLYING			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_D_FLYING_MODE_0_FLYING_MODE_OFF_FLYING			_MK_ENUM_CONST(0x1)


// Register PDP_RDMA_D_SRC_BASE_ADDR_LOW_0
#define PDP_RDMA_D_SRC_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0xa01c)
#define PDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT)


// Register PDP_RDMA_D_SRC_BASE_ADDR_HIGH_0
#define PDP_RDMA_D_SRC_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0xa020)
#define PDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT)


// Register PDP_RDMA_D_SRC_LINE_STRIDE_0
#define PDP_RDMA_D_SRC_LINE_STRIDE_0			_MK_ADDR_CONST(0xa024)
#define PDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT)


// Register PDP_RDMA_D_SRC_SURFACE_STRIDE_0
#define PDP_RDMA_D_SRC_SURFACE_STRIDE_0			_MK_ADDR_CONST(0xa028)
#define PDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT)


// Register PDP_RDMA_D_SRC_RAM_CFG_0
#define PDP_RDMA_D_SRC_RAM_CFG_0			_MK_ADDR_CONST(0xa02c)
#define PDP_RDMA_D_SRC_RAM_CFG_0_SRC_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_SRC_RAM_CFG_0_SRC_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, PDP_RDMA_D_SRC_RAM_CFG_0_SRC_RAM_TYPE_SHIFT)
#define PDP_RDMA_D_SRC_RAM_CFG_0_SRC_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_D_SRC_RAM_CFG_0_SRC_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register PDP_RDMA_D_DATA_FORMAT_0
#define PDP_RDMA_D_DATA_FORMAT_0			_MK_ADDR_CONST(0xa030)
#define PDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_FIELD			_MK_FIELD_CONST(0x3, PDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_SHIFT)
#define PDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_INT8			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_INT16			_MK_ENUM_CONST(0x1)
#define PDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_FP16			_MK_ENUM_CONST(0x2)


// Register PDP_RDMA_D_OPERATION_MODE_CFG_0
#define PDP_RDMA_D_OPERATION_MODE_CFG_0			_MK_ADDR_CONST(0xa034)
#define PDP_RDMA_D_OPERATION_MODE_CFG_0_SPLIT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_OPERATION_MODE_CFG_0_SPLIT_NUM_FIELD			_MK_FIELD_CONST(0xff, PDP_RDMA_D_OPERATION_MODE_CFG_0_SPLIT_NUM_SHIFT)


// Register PDP_RDMA_D_POOLING_KERNEL_CFG_0
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0			_MK_ADDR_CONST(0xa038)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_FIELD			_MK_FIELD_CONST(0xf, PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_SHIFT)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_1			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_2			_MK_ENUM_CONST(0x1)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_3			_MK_ENUM_CONST(0x2)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_4			_MK_ENUM_CONST(0x3)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_5			_MK_ENUM_CONST(0x4)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_6			_MK_ENUM_CONST(0x5)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_7			_MK_ENUM_CONST(0x6)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_8			_MK_ENUM_CONST(0x7)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_WIDTH_SHIFT			_MK_SHIFT_CONST(4)
#define PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_WIDTH_FIELD			_MK_FIELD_CONST(0xf, PDP_RDMA_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_WIDTH_SHIFT)


// Register PDP_RDMA_D_POOLING_PADDING_CFG_0
#define PDP_RDMA_D_POOLING_PADDING_CFG_0			_MK_ADDR_CONST(0xa03c)
#define PDP_RDMA_D_POOLING_PADDING_CFG_0_PAD_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_POOLING_PADDING_CFG_0_PAD_WIDTH_FIELD			_MK_FIELD_CONST(0xf, PDP_RDMA_D_POOLING_PADDING_CFG_0_PAD_WIDTH_SHIFT)


// Register PDP_RDMA_D_PARTIAL_WIDTH_IN_0
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0			_MK_ADDR_CONST(0xa040)
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_FIRST_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_FIRST_FIELD			_MK_FIELD_CONST(0x3ff, PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_FIRST_SHIFT)
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_LAST_SHIFT			_MK_SHIFT_CONST(10)
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_LAST_FIELD			_MK_FIELD_CONST(0x3ff, PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_LAST_SHIFT)
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_MID_SHIFT			_MK_SHIFT_CONST(20)
#define PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_MID_FIELD			_MK_FIELD_CONST(0x3ff, PDP_RDMA_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_MID_SHIFT)


// Register PDP_RDMA_D_PERF_ENABLE_0
#define PDP_RDMA_D_PERF_ENABLE_0			_MK_ADDR_CONST(0xa044)
#define PDP_RDMA_D_PERF_ENABLE_0_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_PERF_ENABLE_0_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, PDP_RDMA_D_PERF_ENABLE_0_DMA_EN_SHIFT)
#define PDP_RDMA_D_PERF_ENABLE_0_DMA_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define PDP_RDMA_D_PERF_ENABLE_0_DMA_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register PDP_RDMA_D_PERF_READ_STALL_0
#define PDP_RDMA_D_PERF_READ_STALL_0			_MK_ADDR_CONST(0xa048)
#define PDP_RDMA_D_PERF_READ_STALL_0_PERF_READ_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_PERF_READ_STALL_0_PERF_READ_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_RDMA_D_PERF_READ_STALL_0_PERF_READ_STALL_SHIFT)


// Register PDP_RDMA_D_CYA_0
#define PDP_RDMA_D_CYA_0			_MK_ADDR_CONST(0xa04c)
#define PDP_RDMA_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_RDMA_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_RDMA_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register PDP_S_STATUS_0
#define PDP_S_STATUS_0			_MK_ADDR_CONST(0xb000)
#define PDP_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, PDP_S_STATUS_0_STATUS_0_SHIFT)
#define PDP_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define PDP_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define PDP_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define PDP_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define PDP_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, PDP_S_STATUS_0_STATUS_1_SHIFT)
#define PDP_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define PDP_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define PDP_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register PDP_S_POINTER_0
#define PDP_S_POINTER_0			_MK_ADDR_CONST(0xb004)
#define PDP_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, PDP_S_POINTER_0_PRODUCER_SHIFT)
#define PDP_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define PDP_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define PDP_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define PDP_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, PDP_S_POINTER_0_CONSUMER_SHIFT)
#define PDP_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define PDP_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register PDP_D_OP_ENABLE_0
#define PDP_D_OP_ENABLE_0			_MK_ADDR_CONST(0xb008)
#define PDP_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, PDP_D_OP_ENABLE_0_OP_EN_SHIFT)
#define PDP_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define PDP_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register PDP_D_DATA_CUBE_IN_WIDTH_0
#define PDP_D_DATA_CUBE_IN_WIDTH_0			_MK_ADDR_CONST(0xb00c)
#define PDP_D_DATA_CUBE_IN_WIDTH_0_CUBE_IN_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_CUBE_IN_WIDTH_0_CUBE_IN_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, PDP_D_DATA_CUBE_IN_WIDTH_0_CUBE_IN_WIDTH_SHIFT)


// Register PDP_D_DATA_CUBE_IN_HEIGHT_0
#define PDP_D_DATA_CUBE_IN_HEIGHT_0			_MK_ADDR_CONST(0xb010)
#define PDP_D_DATA_CUBE_IN_HEIGHT_0_CUBE_IN_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_CUBE_IN_HEIGHT_0_CUBE_IN_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, PDP_D_DATA_CUBE_IN_HEIGHT_0_CUBE_IN_HEIGHT_SHIFT)


// Register PDP_D_DATA_CUBE_IN_CHANNEL_0
#define PDP_D_DATA_CUBE_IN_CHANNEL_0			_MK_ADDR_CONST(0xb014)
#define PDP_D_DATA_CUBE_IN_CHANNEL_0_CUBE_IN_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_CUBE_IN_CHANNEL_0_CUBE_IN_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, PDP_D_DATA_CUBE_IN_CHANNEL_0_CUBE_IN_CHANNEL_SHIFT)


// Register PDP_D_DATA_CUBE_OUT_WIDTH_0
#define PDP_D_DATA_CUBE_OUT_WIDTH_0			_MK_ADDR_CONST(0xb018)
#define PDP_D_DATA_CUBE_OUT_WIDTH_0_CUBE_OUT_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_CUBE_OUT_WIDTH_0_CUBE_OUT_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, PDP_D_DATA_CUBE_OUT_WIDTH_0_CUBE_OUT_WIDTH_SHIFT)


// Register PDP_D_DATA_CUBE_OUT_HEIGHT_0
#define PDP_D_DATA_CUBE_OUT_HEIGHT_0			_MK_ADDR_CONST(0xb01c)
#define PDP_D_DATA_CUBE_OUT_HEIGHT_0_CUBE_OUT_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_CUBE_OUT_HEIGHT_0_CUBE_OUT_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, PDP_D_DATA_CUBE_OUT_HEIGHT_0_CUBE_OUT_HEIGHT_SHIFT)


// Register PDP_D_DATA_CUBE_OUT_CHANNEL_0
#define PDP_D_DATA_CUBE_OUT_CHANNEL_0			_MK_ADDR_CONST(0xb020)
#define PDP_D_DATA_CUBE_OUT_CHANNEL_0_CUBE_OUT_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_CUBE_OUT_CHANNEL_0_CUBE_OUT_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, PDP_D_DATA_CUBE_OUT_CHANNEL_0_CUBE_OUT_CHANNEL_SHIFT)


// Register PDP_D_OPERATION_MODE_CFG_0
#define PDP_D_OPERATION_MODE_CFG_0			_MK_ADDR_CONST(0xb024)
#define PDP_D_OPERATION_MODE_CFG_0_POOLING_METHOD_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_OPERATION_MODE_CFG_0_POOLING_METHOD_FIELD			_MK_FIELD_CONST(0x3, PDP_D_OPERATION_MODE_CFG_0_POOLING_METHOD_SHIFT)
#define PDP_D_OPERATION_MODE_CFG_0_POOLING_METHOD_POOLING_METHOD_AVERAGE			_MK_ENUM_CONST(0x0)
#define PDP_D_OPERATION_MODE_CFG_0_POOLING_METHOD_POOLING_METHOD_MAX			_MK_ENUM_CONST(0x1)
#define PDP_D_OPERATION_MODE_CFG_0_POOLING_METHOD_POOLING_METHOD_MIN			_MK_ENUM_CONST(0x2)
#define PDP_D_OPERATION_MODE_CFG_0_FLYING_MODE_SHIFT			_MK_SHIFT_CONST(4)
#define PDP_D_OPERATION_MODE_CFG_0_FLYING_MODE_FIELD			_MK_FIELD_CONST(0x1, PDP_D_OPERATION_MODE_CFG_0_FLYING_MODE_SHIFT)
#define PDP_D_OPERATION_MODE_CFG_0_FLYING_MODE_ON_FLYING			_MK_ENUM_CONST(0x0)
#define PDP_D_OPERATION_MODE_CFG_0_FLYING_MODE_OFF_FLYING			_MK_ENUM_CONST(0x1)
#define PDP_D_OPERATION_MODE_CFG_0_SPLIT_NUM_SHIFT			_MK_SHIFT_CONST(8)
#define PDP_D_OPERATION_MODE_CFG_0_SPLIT_NUM_FIELD			_MK_FIELD_CONST(0xff, PDP_D_OPERATION_MODE_CFG_0_SPLIT_NUM_SHIFT)


// Register PDP_D_NAN_FLUSH_TO_ZERO_0
#define PDP_D_NAN_FLUSH_TO_ZERO_0			_MK_ADDR_CONST(0xb028)
#define PDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_FIELD			_MK_FIELD_CONST(0x1, PDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_SHIFT)
#define PDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_DISABLE			_MK_ENUM_CONST(0x0)
#define PDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_ENABLE			_MK_ENUM_CONST(0x1)


// Register PDP_D_PARTIAL_WIDTH_IN_0
#define PDP_D_PARTIAL_WIDTH_IN_0			_MK_ADDR_CONST(0xb02c)
#define PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_FIRST_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_FIRST_FIELD			_MK_FIELD_CONST(0x3ff, PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_FIRST_SHIFT)
#define PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_LAST_SHIFT			_MK_SHIFT_CONST(10)
#define PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_LAST_FIELD			_MK_FIELD_CONST(0x3ff, PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_LAST_SHIFT)
#define PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_MID_SHIFT			_MK_SHIFT_CONST(20)
#define PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_MID_FIELD			_MK_FIELD_CONST(0x3ff, PDP_D_PARTIAL_WIDTH_IN_0_PARTIAL_WIDTH_IN_MID_SHIFT)


// Register PDP_D_PARTIAL_WIDTH_OUT_0
#define PDP_D_PARTIAL_WIDTH_OUT_0			_MK_ADDR_CONST(0xb030)
#define PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_FIRST_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_FIRST_FIELD			_MK_FIELD_CONST(0x3ff, PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_FIRST_SHIFT)
#define PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_LAST_SHIFT			_MK_SHIFT_CONST(10)
#define PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_LAST_FIELD			_MK_FIELD_CONST(0x3ff, PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_LAST_SHIFT)
#define PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_MID_SHIFT			_MK_SHIFT_CONST(20)
#define PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_MID_FIELD			_MK_FIELD_CONST(0x3ff, PDP_D_PARTIAL_WIDTH_OUT_0_PARTIAL_WIDTH_OUT_MID_SHIFT)


// Register PDP_D_POOLING_KERNEL_CFG_0
#define PDP_D_POOLING_KERNEL_CFG_0			_MK_ADDR_CONST(0xb034)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_FIELD			_MK_FIELD_CONST(0xf, PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_SHIFT)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_1			_MK_ENUM_CONST(0x0)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_2			_MK_ENUM_CONST(0x1)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_3			_MK_ENUM_CONST(0x2)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_4			_MK_ENUM_CONST(0x3)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_5			_MK_ENUM_CONST(0x4)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_6			_MK_ENUM_CONST(0x5)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_7			_MK_ENUM_CONST(0x6)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_WIDTH_KERNEL_WIDTH_8			_MK_ENUM_CONST(0x7)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_SHIFT			_MK_SHIFT_CONST(8)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_FIELD			_MK_FIELD_CONST(0xf, PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_SHIFT)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_1			_MK_ENUM_CONST(0x0)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_2			_MK_ENUM_CONST(0x1)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_3			_MK_ENUM_CONST(0x2)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_4			_MK_ENUM_CONST(0x3)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_5			_MK_ENUM_CONST(0x4)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_6			_MK_ENUM_CONST(0x5)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_7			_MK_ENUM_CONST(0x6)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_HEIGHT_KERNEL_HEIGHT_8			_MK_ENUM_CONST(0x7)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_WIDTH_SHIFT			_MK_SHIFT_CONST(16)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_WIDTH_FIELD			_MK_FIELD_CONST(0xf, PDP_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_WIDTH_SHIFT)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_HEIGHT_SHIFT			_MK_SHIFT_CONST(20)
#define PDP_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_HEIGHT_FIELD			_MK_FIELD_CONST(0xf, PDP_D_POOLING_KERNEL_CFG_0_KERNEL_STRIDE_HEIGHT_SHIFT)


// Register PDP_D_RECIP_KERNEL_WIDTH_0
#define PDP_D_RECIP_KERNEL_WIDTH_0			_MK_ADDR_CONST(0xb038)
#define PDP_D_RECIP_KERNEL_WIDTH_0_RECIP_KERNEL_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_RECIP_KERNEL_WIDTH_0_RECIP_KERNEL_WIDTH_FIELD			_MK_FIELD_CONST(0x1ffff, PDP_D_RECIP_KERNEL_WIDTH_0_RECIP_KERNEL_WIDTH_SHIFT)


// Register PDP_D_RECIP_KERNEL_HEIGHT_0
#define PDP_D_RECIP_KERNEL_HEIGHT_0			_MK_ADDR_CONST(0xb03c)
#define PDP_D_RECIP_KERNEL_HEIGHT_0_RECIP_KERNEL_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_RECIP_KERNEL_HEIGHT_0_RECIP_KERNEL_HEIGHT_FIELD			_MK_FIELD_CONST(0x1ffff, PDP_D_RECIP_KERNEL_HEIGHT_0_RECIP_KERNEL_HEIGHT_SHIFT)


// Register PDP_D_POOLING_PADDING_CFG_0
#define PDP_D_POOLING_PADDING_CFG_0			_MK_ADDR_CONST(0xb040)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_LEFT_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_LEFT_FIELD			_MK_FIELD_CONST(0x7, PDP_D_POOLING_PADDING_CFG_0_PAD_LEFT_SHIFT)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_TOP_SHIFT			_MK_SHIFT_CONST(4)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_TOP_FIELD			_MK_FIELD_CONST(0x7, PDP_D_POOLING_PADDING_CFG_0_PAD_TOP_SHIFT)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_RIGHT_SHIFT			_MK_SHIFT_CONST(8)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_RIGHT_FIELD			_MK_FIELD_CONST(0x7, PDP_D_POOLING_PADDING_CFG_0_PAD_RIGHT_SHIFT)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_BOTTOM_SHIFT			_MK_SHIFT_CONST(12)
#define PDP_D_POOLING_PADDING_CFG_0_PAD_BOTTOM_FIELD			_MK_FIELD_CONST(0x7, PDP_D_POOLING_PADDING_CFG_0_PAD_BOTTOM_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_1_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_1_CFG_0			_MK_ADDR_CONST(0xb044)
#define PDP_D_POOLING_PADDING_VALUE_1_CFG_0_PAD_VALUE_1X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_1_CFG_0_PAD_VALUE_1X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_1_CFG_0_PAD_VALUE_1X_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_2_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_2_CFG_0			_MK_ADDR_CONST(0xb048)
#define PDP_D_POOLING_PADDING_VALUE_2_CFG_0_PAD_VALUE_2X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_2_CFG_0_PAD_VALUE_2X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_2_CFG_0_PAD_VALUE_2X_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_3_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_3_CFG_0			_MK_ADDR_CONST(0xb04c)
#define PDP_D_POOLING_PADDING_VALUE_3_CFG_0_PAD_VALUE_3X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_3_CFG_0_PAD_VALUE_3X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_3_CFG_0_PAD_VALUE_3X_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_4_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_4_CFG_0			_MK_ADDR_CONST(0xb050)
#define PDP_D_POOLING_PADDING_VALUE_4_CFG_0_PAD_VALUE_4X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_4_CFG_0_PAD_VALUE_4X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_4_CFG_0_PAD_VALUE_4X_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_5_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_5_CFG_0			_MK_ADDR_CONST(0xb054)
#define PDP_D_POOLING_PADDING_VALUE_5_CFG_0_PAD_VALUE_5X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_5_CFG_0_PAD_VALUE_5X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_5_CFG_0_PAD_VALUE_5X_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_6_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_6_CFG_0			_MK_ADDR_CONST(0xb058)
#define PDP_D_POOLING_PADDING_VALUE_6_CFG_0_PAD_VALUE_6X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_6_CFG_0_PAD_VALUE_6X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_6_CFG_0_PAD_VALUE_6X_SHIFT)


// Register PDP_D_POOLING_PADDING_VALUE_7_CFG_0
#define PDP_D_POOLING_PADDING_VALUE_7_CFG_0			_MK_ADDR_CONST(0xb05c)
#define PDP_D_POOLING_PADDING_VALUE_7_CFG_0_PAD_VALUE_7X_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_POOLING_PADDING_VALUE_7_CFG_0_PAD_VALUE_7X_FIELD			_MK_FIELD_CONST(0x7ffff, PDP_D_POOLING_PADDING_VALUE_7_CFG_0_PAD_VALUE_7X_SHIFT)


// Register PDP_D_SRC_BASE_ADDR_LOW_0
#define PDP_D_SRC_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0xb060)
#define PDP_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT)


// Register PDP_D_SRC_BASE_ADDR_HIGH_0
#define PDP_D_SRC_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0xb064)
#define PDP_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT)


// Register PDP_D_SRC_LINE_STRIDE_0
#define PDP_D_SRC_LINE_STRIDE_0			_MK_ADDR_CONST(0xb068)
#define PDP_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT)


// Register PDP_D_SRC_SURFACE_STRIDE_0
#define PDP_D_SRC_SURFACE_STRIDE_0			_MK_ADDR_CONST(0xb06c)
#define PDP_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT)


// Register PDP_D_DST_BASE_ADDR_LOW_0
#define PDP_D_DST_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0xb070)
#define PDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_SHIFT)


// Register PDP_D_DST_BASE_ADDR_HIGH_0
#define PDP_D_DST_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0xb074)
#define PDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_SHIFT)


// Register PDP_D_DST_LINE_STRIDE_0
#define PDP_D_DST_LINE_STRIDE_0			_MK_ADDR_CONST(0xb078)
#define PDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_SHIFT)


// Register PDP_D_DST_SURFACE_STRIDE_0
#define PDP_D_DST_SURFACE_STRIDE_0			_MK_ADDR_CONST(0xb07c)
#define PDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_SHIFT)


// Register PDP_D_DST_RAM_CFG_0
#define PDP_D_DST_RAM_CFG_0			_MK_ADDR_CONST(0xb080)
#define PDP_D_DST_RAM_CFG_0_DST_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DST_RAM_CFG_0_DST_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, PDP_D_DST_RAM_CFG_0_DST_RAM_TYPE_SHIFT)
#define PDP_D_DST_RAM_CFG_0_DST_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define PDP_D_DST_RAM_CFG_0_DST_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register PDP_D_DATA_FORMAT_0
#define PDP_D_DATA_FORMAT_0			_MK_ADDR_CONST(0xb084)
#define PDP_D_DATA_FORMAT_0_INPUT_DATA_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_DATA_FORMAT_0_INPUT_DATA_FIELD			_MK_FIELD_CONST(0x3, PDP_D_DATA_FORMAT_0_INPUT_DATA_SHIFT)
#define PDP_D_DATA_FORMAT_0_INPUT_DATA_INT8			_MK_ENUM_CONST(0x0)
#define PDP_D_DATA_FORMAT_0_INPUT_DATA_INT16			_MK_ENUM_CONST(0x1)
#define PDP_D_DATA_FORMAT_0_INPUT_DATA_FP16			_MK_ENUM_CONST(0x2)


// Register PDP_D_INF_INPUT_NUM_0
#define PDP_D_INF_INPUT_NUM_0			_MK_ADDR_CONST(0xb088)
#define PDP_D_INF_INPUT_NUM_0_INF_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_INF_INPUT_NUM_0_INF_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_INF_INPUT_NUM_0_INF_INPUT_NUM_SHIFT)


// Register PDP_D_NAN_INPUT_NUM_0
#define PDP_D_NAN_INPUT_NUM_0			_MK_ADDR_CONST(0xb08c)
#define PDP_D_NAN_INPUT_NUM_0_NAN_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_NAN_INPUT_NUM_0_NAN_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_NAN_INPUT_NUM_0_NAN_INPUT_NUM_SHIFT)


// Register PDP_D_NAN_OUTPUT_NUM_0
#define PDP_D_NAN_OUTPUT_NUM_0			_MK_ADDR_CONST(0xb090)
#define PDP_D_NAN_OUTPUT_NUM_0_NAN_OUTPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_NAN_OUTPUT_NUM_0_NAN_OUTPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_NAN_OUTPUT_NUM_0_NAN_OUTPUT_NUM_SHIFT)


// Register PDP_D_PERF_ENABLE_0
#define PDP_D_PERF_ENABLE_0			_MK_ADDR_CONST(0xb094)
#define PDP_D_PERF_ENABLE_0_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_PERF_ENABLE_0_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, PDP_D_PERF_ENABLE_0_DMA_EN_SHIFT)
#define PDP_D_PERF_ENABLE_0_DMA_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define PDP_D_PERF_ENABLE_0_DMA_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register PDP_D_PERF_WRITE_STALL_0
#define PDP_D_PERF_WRITE_STALL_0			_MK_ADDR_CONST(0xb098)
#define PDP_D_PERF_WRITE_STALL_0_PERF_WRITE_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_PERF_WRITE_STALL_0_PERF_WRITE_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_PERF_WRITE_STALL_0_PERF_WRITE_STALL_SHIFT)


// Register PDP_D_CYA_0
#define PDP_D_CYA_0			_MK_ADDR_CONST(0xb09c)
#define PDP_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define PDP_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, PDP_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CDP_RDMA_S_STATUS_0
#define CDP_RDMA_S_STATUS_0			_MK_ADDR_CONST(0xc000)
#define CDP_RDMA_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CDP_RDMA_S_STATUS_0_STATUS_0_SHIFT)
#define CDP_RDMA_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CDP_RDMA_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CDP_RDMA_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_RDMA_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CDP_RDMA_S_STATUS_0_STATUS_1_SHIFT)
#define CDP_RDMA_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CDP_RDMA_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CDP_RDMA_S_POINTER_0
#define CDP_RDMA_S_POINTER_0			_MK_ADDR_CONST(0xc004)
#define CDP_RDMA_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CDP_RDMA_S_POINTER_0_PRODUCER_SHIFT)
#define CDP_RDMA_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CDP_RDMA_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_RDMA_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CDP_RDMA_S_POINTER_0_CONSUMER_SHIFT)
#define CDP_RDMA_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CDP_RDMA_D_OP_ENABLE_0
#define CDP_RDMA_D_OP_ENABLE_0			_MK_ADDR_CONST(0xc008)
#define CDP_RDMA_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_RDMA_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CDP_RDMA_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_RDMA_D_DATA_CUBE_WIDTH_0
#define CDP_RDMA_D_DATA_CUBE_WIDTH_0			_MK_ADDR_CONST(0xc00c)
#define CDP_RDMA_D_DATA_CUBE_WIDTH_0_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_DATA_CUBE_WIDTH_0_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, CDP_RDMA_D_DATA_CUBE_WIDTH_0_WIDTH_SHIFT)


// Register CDP_RDMA_D_DATA_CUBE_HEIGHT_0
#define CDP_RDMA_D_DATA_CUBE_HEIGHT_0			_MK_ADDR_CONST(0xc010)
#define CDP_RDMA_D_DATA_CUBE_HEIGHT_0_HEIGHT_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_DATA_CUBE_HEIGHT_0_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, CDP_RDMA_D_DATA_CUBE_HEIGHT_0_HEIGHT_SHIFT)


// Register CDP_RDMA_D_DATA_CUBE_CHANNEL_0
#define CDP_RDMA_D_DATA_CUBE_CHANNEL_0			_MK_ADDR_CONST(0xc014)
#define CDP_RDMA_D_DATA_CUBE_CHANNEL_0_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_DATA_CUBE_CHANNEL_0_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, CDP_RDMA_D_DATA_CUBE_CHANNEL_0_CHANNEL_SHIFT)


// Register CDP_RDMA_D_SRC_BASE_ADDR_LOW_0
#define CDP_RDMA_D_SRC_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0xc018)
#define CDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_RDMA_D_SRC_BASE_ADDR_LOW_0_SRC_BASE_ADDR_LOW_SHIFT)


// Register CDP_RDMA_D_SRC_BASE_ADDR_HIGH_0
#define CDP_RDMA_D_SRC_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0xc01c)
#define CDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_RDMA_D_SRC_BASE_ADDR_HIGH_0_SRC_BASE_ADDR_HIGH_SHIFT)


// Register CDP_RDMA_D_SRC_LINE_STRIDE_0
#define CDP_RDMA_D_SRC_LINE_STRIDE_0			_MK_ADDR_CONST(0xc020)
#define CDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_RDMA_D_SRC_LINE_STRIDE_0_SRC_LINE_STRIDE_SHIFT)


// Register CDP_RDMA_D_SRC_SURFACE_STRIDE_0
#define CDP_RDMA_D_SRC_SURFACE_STRIDE_0			_MK_ADDR_CONST(0xc024)
#define CDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_RDMA_D_SRC_SURFACE_STRIDE_0_SRC_SURFACE_STRIDE_SHIFT)


// Register CDP_RDMA_D_SRC_DMA_CFG_0
#define CDP_RDMA_D_SRC_DMA_CFG_0			_MK_ADDR_CONST(0xc028)
#define CDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, CDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_SHIFT)
#define CDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_D_SRC_DMA_CFG_0_SRC_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register CDP_RDMA_D_SRC_COMPRESSION_EN_0
#define CDP_RDMA_D_SRC_COMPRESSION_EN_0			_MK_ADDR_CONST(0xc02c)
#define CDP_RDMA_D_SRC_COMPRESSION_EN_0_SRC_COMPRESSION_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_SRC_COMPRESSION_EN_0_SRC_COMPRESSION_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_RDMA_D_SRC_COMPRESSION_EN_0_SRC_COMPRESSION_EN_SHIFT)
#define CDP_RDMA_D_SRC_COMPRESSION_EN_0_SRC_COMPRESSION_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_D_SRC_COMPRESSION_EN_0_SRC_COMPRESSION_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_RDMA_D_OPERATION_MODE_0
#define CDP_RDMA_D_OPERATION_MODE_0			_MK_ADDR_CONST(0xc030)
#define CDP_RDMA_D_OPERATION_MODE_0_OPERATION_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_OPERATION_MODE_0_OPERATION_MODE_FIELD			_MK_FIELD_CONST(0x3, CDP_RDMA_D_OPERATION_MODE_0_OPERATION_MODE_SHIFT)
#define CDP_RDMA_D_OPERATION_MODE_0_OPERATION_MODE_READPHILE			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_D_OPERATION_MODE_0_OPERATION_MODE_WRITEPHILE			_MK_ENUM_CONST(0x1)
#define CDP_RDMA_D_OPERATION_MODE_0_OPERATION_MODE_ORDINARY			_MK_ENUM_CONST(0x2)


// Register CDP_RDMA_D_DATA_FORMAT_0
#define CDP_RDMA_D_DATA_FORMAT_0			_MK_ADDR_CONST(0xc034)
#define CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_FIELD			_MK_FIELD_CONST(0x3, CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_SHIFT)
#define CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_INT8			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_INT16			_MK_ENUM_CONST(0x1)
#define CDP_RDMA_D_DATA_FORMAT_0_INPUT_DATA_FP16			_MK_ENUM_CONST(0x2)


// Register CDP_RDMA_D_PERF_ENABLE_0
#define CDP_RDMA_D_PERF_ENABLE_0			_MK_ADDR_CONST(0xc038)
#define CDP_RDMA_D_PERF_ENABLE_0_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_PERF_ENABLE_0_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_RDMA_D_PERF_ENABLE_0_DMA_EN_SHIFT)
#define CDP_RDMA_D_PERF_ENABLE_0_DMA_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_RDMA_D_PERF_ENABLE_0_DMA_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_RDMA_D_PERF_READ_STALL_0
#define CDP_RDMA_D_PERF_READ_STALL_0			_MK_ADDR_CONST(0xc03c)
#define CDP_RDMA_D_PERF_READ_STALL_0_PERF_READ_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_PERF_READ_STALL_0_PERF_READ_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_RDMA_D_PERF_READ_STALL_0_PERF_READ_STALL_SHIFT)


// Register CDP_RDMA_D_CYA_0
#define CDP_RDMA_D_CYA_0			_MK_ADDR_CONST(0xc040)
#define CDP_RDMA_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_RDMA_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_RDMA_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register CDP_S_STATUS_0
#define CDP_S_STATUS_0			_MK_ADDR_CONST(0xd000)
#define CDP_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, CDP_S_STATUS_0_STATUS_0_SHIFT)
#define CDP_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define CDP_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define CDP_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define CDP_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, CDP_S_STATUS_0_STATUS_1_SHIFT)
#define CDP_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define CDP_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define CDP_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register CDP_S_POINTER_0
#define CDP_S_POINTER_0			_MK_ADDR_CONST(0xd004)
#define CDP_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, CDP_S_POINTER_0_PRODUCER_SHIFT)
#define CDP_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CDP_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define CDP_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, CDP_S_POINTER_0_CONSUMER_SHIFT)
#define CDP_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define CDP_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register CDP_S_LUT_ACCESS_CFG_0
#define CDP_S_LUT_ACCESS_CFG_0			_MK_ADDR_CONST(0xd008)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_ADDR_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_ADDR_FIELD			_MK_FIELD_CONST(0x3ff, CDP_S_LUT_ACCESS_CFG_0_LUT_ADDR_SHIFT)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_FIELD			_MK_FIELD_CONST(0x1, CDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_SHIFT)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_LE			_MK_ENUM_CONST(0x0)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_TABLE_ID_LO			_MK_ENUM_CONST(0x1)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_SHIFT			_MK_SHIFT_CONST(17)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_FIELD			_MK_FIELD_CONST(0x1, CDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_SHIFT)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_READ			_MK_ENUM_CONST(0x0)
#define CDP_S_LUT_ACCESS_CFG_0_LUT_ACCESS_TYPE_WRITE			_MK_ENUM_CONST(0x1)


// Register CDP_S_LUT_ACCESS_DATA_0
#define CDP_S_LUT_ACCESS_DATA_0			_MK_ADDR_CONST(0xd00c)
#define CDP_S_LUT_ACCESS_DATA_0_LUT_DATA_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_ACCESS_DATA_0_LUT_DATA_FIELD			_MK_FIELD_CONST(0xffff, CDP_S_LUT_ACCESS_DATA_0_LUT_DATA_SHIFT)


// Register CDP_S_LUT_CFG_0
#define CDP_S_LUT_CFG_0			_MK_ADDR_CONST(0xd010)
#define CDP_S_LUT_CFG_0_LUT_LE_FUNCTION_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_CFG_0_LUT_LE_FUNCTION_FIELD			_MK_FIELD_CONST(0x1, CDP_S_LUT_CFG_0_LUT_LE_FUNCTION_SHIFT)
#define CDP_S_LUT_CFG_0_LUT_LE_FUNCTION_EXPONENT			_MK_ENUM_CONST(0x0)
#define CDP_S_LUT_CFG_0_LUT_LE_FUNCTION_LINEAR			_MK_ENUM_CONST(0x1)
#define CDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_SHIFT			_MK_SHIFT_CONST(4)
#define CDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_FIELD			_MK_FIELD_CONST(0x1, CDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_SHIFT)
#define CDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_LE			_MK_ENUM_CONST(0x0)
#define CDP_S_LUT_CFG_0_LUT_UFLOW_PRIORITY_LO			_MK_ENUM_CONST(0x1)
#define CDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_SHIFT			_MK_SHIFT_CONST(5)
#define CDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_FIELD			_MK_FIELD_CONST(0x1, CDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_SHIFT)
#define CDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_LE			_MK_ENUM_CONST(0x0)
#define CDP_S_LUT_CFG_0_LUT_OFLOW_PRIORITY_LO			_MK_ENUM_CONST(0x1)
#define CDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_SHIFT			_MK_SHIFT_CONST(6)
#define CDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_FIELD			_MK_FIELD_CONST(0x1, CDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_SHIFT)
#define CDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_LE			_MK_ENUM_CONST(0x0)
#define CDP_S_LUT_CFG_0_LUT_HYBRID_PRIORITY_LO			_MK_ENUM_CONST(0x1)


// Register CDP_S_LUT_INFO_0
#define CDP_S_LUT_INFO_0			_MK_ADDR_CONST(0xd014)
#define CDP_S_LUT_INFO_0_LUT_LE_INDEX_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_INFO_0_LUT_LE_INDEX_OFFSET_FIELD			_MK_FIELD_CONST(0xff, CDP_S_LUT_INFO_0_LUT_LE_INDEX_OFFSET_SHIFT)
#define CDP_S_LUT_INFO_0_LUT_LE_INDEX_SELECT_SHIFT			_MK_SHIFT_CONST(8)
#define CDP_S_LUT_INFO_0_LUT_LE_INDEX_SELECT_FIELD			_MK_FIELD_CONST(0xff, CDP_S_LUT_INFO_0_LUT_LE_INDEX_SELECT_SHIFT)
#define CDP_S_LUT_INFO_0_LUT_LO_INDEX_SELECT_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_S_LUT_INFO_0_LUT_LO_INDEX_SELECT_FIELD			_MK_FIELD_CONST(0xff, CDP_S_LUT_INFO_0_LUT_LO_INDEX_SELECT_SHIFT)


// Register CDP_S_LUT_LE_START_LOW_0
#define CDP_S_LUT_LE_START_LOW_0			_MK_ADDR_CONST(0xd018)
#define CDP_S_LUT_LE_START_LOW_0_LUT_LE_START_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LE_START_LOW_0_LUT_LE_START_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_S_LUT_LE_START_LOW_0_LUT_LE_START_LOW_SHIFT)


// Register CDP_S_LUT_LE_START_HIGH_0
#define CDP_S_LUT_LE_START_HIGH_0			_MK_ADDR_CONST(0xd01c)
#define CDP_S_LUT_LE_START_HIGH_0_LUT_LE_START_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LE_START_HIGH_0_LUT_LE_START_HIGH_FIELD			_MK_FIELD_CONST(0x3f, CDP_S_LUT_LE_START_HIGH_0_LUT_LE_START_HIGH_SHIFT)


// Register CDP_S_LUT_LE_END_LOW_0
#define CDP_S_LUT_LE_END_LOW_0			_MK_ADDR_CONST(0xd020)
#define CDP_S_LUT_LE_END_LOW_0_LUT_LE_END_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LE_END_LOW_0_LUT_LE_END_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_S_LUT_LE_END_LOW_0_LUT_LE_END_LOW_SHIFT)


// Register CDP_S_LUT_LE_END_HIGH_0
#define CDP_S_LUT_LE_END_HIGH_0			_MK_ADDR_CONST(0xd024)
#define CDP_S_LUT_LE_END_HIGH_0_LUT_LE_END_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LE_END_HIGH_0_LUT_LE_END_HIGH_FIELD			_MK_FIELD_CONST(0x3f, CDP_S_LUT_LE_END_HIGH_0_LUT_LE_END_HIGH_SHIFT)


// Register CDP_S_LUT_LO_START_LOW_0
#define CDP_S_LUT_LO_START_LOW_0			_MK_ADDR_CONST(0xd028)
#define CDP_S_LUT_LO_START_LOW_0_LUT_LO_START_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LO_START_LOW_0_LUT_LO_START_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_S_LUT_LO_START_LOW_0_LUT_LO_START_LOW_SHIFT)


// Register CDP_S_LUT_LO_START_HIGH_0
#define CDP_S_LUT_LO_START_HIGH_0			_MK_ADDR_CONST(0xd02c)
#define CDP_S_LUT_LO_START_HIGH_0_LUT_LO_START_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LO_START_HIGH_0_LUT_LO_START_HIGH_FIELD			_MK_FIELD_CONST(0x3f, CDP_S_LUT_LO_START_HIGH_0_LUT_LO_START_HIGH_SHIFT)


// Register CDP_S_LUT_LO_END_LOW_0
#define CDP_S_LUT_LO_END_LOW_0			_MK_ADDR_CONST(0xd030)
#define CDP_S_LUT_LO_END_LOW_0_LUT_LO_END_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LO_END_LOW_0_LUT_LO_END_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_S_LUT_LO_END_LOW_0_LUT_LO_END_LOW_SHIFT)


// Register CDP_S_LUT_LO_END_HIGH_0
#define CDP_S_LUT_LO_END_HIGH_0			_MK_ADDR_CONST(0xd034)
#define CDP_S_LUT_LO_END_HIGH_0_LUT_LO_END_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LO_END_HIGH_0_LUT_LO_END_HIGH_FIELD			_MK_FIELD_CONST(0x3f, CDP_S_LUT_LO_END_HIGH_0_LUT_LO_END_HIGH_SHIFT)


// Register CDP_S_LUT_LE_SLOPE_SCALE_0
#define CDP_S_LUT_LE_SLOPE_SCALE_0			_MK_ADDR_CONST(0xd038)
#define CDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_UFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_UFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_UFLOW_SCALE_SHIFT)
#define CDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_OFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_OFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDP_S_LUT_LE_SLOPE_SCALE_0_LUT_LE_SLOPE_OFLOW_SCALE_SHIFT)


// Register CDP_S_LUT_LE_SLOPE_SHIFT_0
#define CDP_S_LUT_LE_SLOPE_SHIFT_0			_MK_ADDR_CONST(0xd03c)
#define CDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_UFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_UFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, CDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_UFLOW_SHIFT_SHIFT)
#define CDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_OFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(5)
#define CDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_OFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, CDP_S_LUT_LE_SLOPE_SHIFT_0_LUT_LE_SLOPE_OFLOW_SHIFT_SHIFT)


// Register CDP_S_LUT_LO_SLOPE_SCALE_0
#define CDP_S_LUT_LO_SLOPE_SCALE_0			_MK_ADDR_CONST(0xd040)
#define CDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_UFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_UFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_UFLOW_SCALE_SHIFT)
#define CDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_OFLOW_SCALE_SHIFT			_MK_SHIFT_CONST(16)
#define CDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_OFLOW_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDP_S_LUT_LO_SLOPE_SCALE_0_LUT_LO_SLOPE_OFLOW_SCALE_SHIFT)


// Register CDP_S_LUT_LO_SLOPE_SHIFT_0
#define CDP_S_LUT_LO_SLOPE_SHIFT_0			_MK_ADDR_CONST(0xd044)
#define CDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_UFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_UFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, CDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_UFLOW_SHIFT_SHIFT)
#define CDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_OFLOW_SHIFT_SHIFT			_MK_SHIFT_CONST(5)
#define CDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_OFLOW_SHIFT_FIELD			_MK_FIELD_CONST(0x1f, CDP_S_LUT_LO_SLOPE_SHIFT_0_LUT_LO_SLOPE_OFLOW_SHIFT_SHIFT)


// Register CDP_D_OP_ENABLE_0
#define CDP_D_OP_ENABLE_0			_MK_ADDR_CONST(0xd048)
#define CDP_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_D_OP_ENABLE_0_OP_EN_SHIFT)
#define CDP_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_D_FUNC_BYPASS_0
#define CDP_D_FUNC_BYPASS_0			_MK_ADDR_CONST(0xd04c)
#define CDP_D_FUNC_BYPASS_0_SQSUM_BYPASS_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_FUNC_BYPASS_0_SQSUM_BYPASS_FIELD			_MK_FIELD_CONST(0x1, CDP_D_FUNC_BYPASS_0_SQSUM_BYPASS_SHIFT)
#define CDP_D_FUNC_BYPASS_0_SQSUM_BYPASS_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_FUNC_BYPASS_0_SQSUM_BYPASS_ENABLE			_MK_ENUM_CONST(0x1)
#define CDP_D_FUNC_BYPASS_0_MUL_BYPASS_SHIFT			_MK_SHIFT_CONST(1)
#define CDP_D_FUNC_BYPASS_0_MUL_BYPASS_FIELD			_MK_FIELD_CONST(0x1, CDP_D_FUNC_BYPASS_0_MUL_BYPASS_SHIFT)
#define CDP_D_FUNC_BYPASS_0_MUL_BYPASS_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_FUNC_BYPASS_0_MUL_BYPASS_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_D_DST_BASE_ADDR_LOW_0
#define CDP_D_DST_BASE_ADDR_LOW_0			_MK_ADDR_CONST(0xd050)
#define CDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_DST_BASE_ADDR_LOW_0_DST_BASE_ADDR_LOW_SHIFT)


// Register CDP_D_DST_BASE_ADDR_HIGH_0
#define CDP_D_DST_BASE_ADDR_HIGH_0			_MK_ADDR_CONST(0xd054)
#define CDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_DST_BASE_ADDR_HIGH_0_DST_BASE_ADDR_HIGH_SHIFT)


// Register CDP_D_DST_LINE_STRIDE_0
#define CDP_D_DST_LINE_STRIDE_0			_MK_ADDR_CONST(0xd058)
#define CDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_DST_LINE_STRIDE_0_DST_LINE_STRIDE_SHIFT)


// Register CDP_D_DST_SURFACE_STRIDE_0
#define CDP_D_DST_SURFACE_STRIDE_0			_MK_ADDR_CONST(0xd05c)
#define CDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_DST_SURFACE_STRIDE_0_DST_SURFACE_STRIDE_SHIFT)


// Register CDP_D_DST_DMA_CFG_0
#define CDP_D_DST_DMA_CFG_0			_MK_ADDR_CONST(0xd060)
#define CDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, CDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_SHIFT)
#define CDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_CV			_MK_ENUM_CONST(0x0)
#define CDP_D_DST_DMA_CFG_0_DST_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register CDP_D_DST_COMPRESSION_EN_0
#define CDP_D_DST_COMPRESSION_EN_0			_MK_ADDR_CONST(0xd064)
#define CDP_D_DST_COMPRESSION_EN_0_DST_COMPRESSION_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DST_COMPRESSION_EN_0_DST_COMPRESSION_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_D_DST_COMPRESSION_EN_0_DST_COMPRESSION_EN_SHIFT)
#define CDP_D_DST_COMPRESSION_EN_0_DST_COMPRESSION_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_DST_COMPRESSION_EN_0_DST_COMPRESSION_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_D_DATA_FORMAT_0
#define CDP_D_DATA_FORMAT_0			_MK_ADDR_CONST(0xd068)
#define CDP_D_DATA_FORMAT_0_INPUT_DATA_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATA_FORMAT_0_INPUT_DATA_TYPE_FIELD			_MK_FIELD_CONST(0x3, CDP_D_DATA_FORMAT_0_INPUT_DATA_TYPE_SHIFT)
#define CDP_D_DATA_FORMAT_0_INPUT_DATA_TYPE_INT8			_MK_ENUM_CONST(0x0)
#define CDP_D_DATA_FORMAT_0_INPUT_DATA_TYPE_INT16			_MK_ENUM_CONST(0x1)
#define CDP_D_DATA_FORMAT_0_INPUT_DATA_TYPE_FP16			_MK_ENUM_CONST(0x2)


// Register CDP_D_NAN_FLUSH_TO_ZERO_0
#define CDP_D_NAN_FLUSH_TO_ZERO_0			_MK_ADDR_CONST(0xd06c)
#define CDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_FIELD			_MK_FIELD_CONST(0x1, CDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_SHIFT)
#define CDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_NAN_FLUSH_TO_ZERO_0_NAN_TO_ZERO_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_D_LRN_CFG_0
#define CDP_D_LRN_CFG_0			_MK_ADDR_CONST(0xd070)
#define CDP_D_LRN_CFG_0_NORMALZ_LEN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_LRN_CFG_0_NORMALZ_LEN_FIELD			_MK_FIELD_CONST(0x3, CDP_D_LRN_CFG_0_NORMALZ_LEN_SHIFT)
#define CDP_D_LRN_CFG_0_NORMALZ_LEN_LEN3			_MK_ENUM_CONST(0x0)
#define CDP_D_LRN_CFG_0_NORMALZ_LEN_LEN5			_MK_ENUM_CONST(0x1)
#define CDP_D_LRN_CFG_0_NORMALZ_LEN_LEN7			_MK_ENUM_CONST(0x2)
#define CDP_D_LRN_CFG_0_NORMALZ_LEN_LEN9			_MK_ENUM_CONST(0x3)


// Register CDP_D_DATIN_OFFSET_0
#define CDP_D_DATIN_OFFSET_0			_MK_ADDR_CONST(0xd074)
#define CDP_D_DATIN_OFFSET_0_DATIN_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATIN_OFFSET_0_DATIN_OFFSET_FIELD			_MK_FIELD_CONST(0xffff, CDP_D_DATIN_OFFSET_0_DATIN_OFFSET_SHIFT)


// Register CDP_D_DATIN_SCALE_0
#define CDP_D_DATIN_SCALE_0			_MK_ADDR_CONST(0xd078)
#define CDP_D_DATIN_SCALE_0_DATIN_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATIN_SCALE_0_DATIN_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDP_D_DATIN_SCALE_0_DATIN_SCALE_SHIFT)


// Register CDP_D_DATIN_SHIFTER_0
#define CDP_D_DATIN_SHIFTER_0			_MK_ADDR_CONST(0xd07c)
#define CDP_D_DATIN_SHIFTER_0_DATIN_SHIFTER_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATIN_SHIFTER_0_DATIN_SHIFTER_FIELD			_MK_FIELD_CONST(0x1f, CDP_D_DATIN_SHIFTER_0_DATIN_SHIFTER_SHIFT)


// Register CDP_D_DATOUT_OFFSET_0
#define CDP_D_DATOUT_OFFSET_0			_MK_ADDR_CONST(0xd080)
#define CDP_D_DATOUT_OFFSET_0_DATOUT_OFFSET_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATOUT_OFFSET_0_DATOUT_OFFSET_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_DATOUT_OFFSET_0_DATOUT_OFFSET_SHIFT)


// Register CDP_D_DATOUT_SCALE_0
#define CDP_D_DATOUT_SCALE_0			_MK_ADDR_CONST(0xd084)
#define CDP_D_DATOUT_SCALE_0_DATOUT_SCALE_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATOUT_SCALE_0_DATOUT_SCALE_FIELD			_MK_FIELD_CONST(0xffff, CDP_D_DATOUT_SCALE_0_DATOUT_SCALE_SHIFT)


// Register CDP_D_DATOUT_SHIFTER_0
#define CDP_D_DATOUT_SHIFTER_0			_MK_ADDR_CONST(0xd088)
#define CDP_D_DATOUT_SHIFTER_0_DATOUT_SHIFTER_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_DATOUT_SHIFTER_0_DATOUT_SHIFTER_FIELD			_MK_FIELD_CONST(0x3f, CDP_D_DATOUT_SHIFTER_0_DATOUT_SHIFTER_SHIFT)


// Register CDP_D_NAN_INPUT_NUM_0
#define CDP_D_NAN_INPUT_NUM_0			_MK_ADDR_CONST(0xd08c)
#define CDP_D_NAN_INPUT_NUM_0_NAN_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_NAN_INPUT_NUM_0_NAN_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_NAN_INPUT_NUM_0_NAN_INPUT_NUM_SHIFT)


// Register CDP_D_INF_INPUT_NUM_0
#define CDP_D_INF_INPUT_NUM_0			_MK_ADDR_CONST(0xd090)
#define CDP_D_INF_INPUT_NUM_0_INF_INPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_INF_INPUT_NUM_0_INF_INPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_INF_INPUT_NUM_0_INF_INPUT_NUM_SHIFT)


// Register CDP_D_NAN_OUTPUT_NUM_0
#define CDP_D_NAN_OUTPUT_NUM_0			_MK_ADDR_CONST(0xd094)
#define CDP_D_NAN_OUTPUT_NUM_0_NAN_OUTPUT_NUM_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_NAN_OUTPUT_NUM_0_NAN_OUTPUT_NUM_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_NAN_OUTPUT_NUM_0_NAN_OUTPUT_NUM_SHIFT)


// Register CDP_D_OUT_SATURATION_0
#define CDP_D_OUT_SATURATION_0			_MK_ADDR_CONST(0xd098)
#define CDP_D_OUT_SATURATION_0_OUT_SATURATION_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_OUT_SATURATION_0_OUT_SATURATION_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_OUT_SATURATION_0_OUT_SATURATION_SHIFT)


// Register CDP_D_PERF_ENABLE_0
#define CDP_D_PERF_ENABLE_0			_MK_ADDR_CONST(0xd09c)
#define CDP_D_PERF_ENABLE_0_DMA_EN_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_ENABLE_0_DMA_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_D_PERF_ENABLE_0_DMA_EN_SHIFT)
#define CDP_D_PERF_ENABLE_0_DMA_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_PERF_ENABLE_0_DMA_EN_ENABLE			_MK_ENUM_CONST(0x1)
#define CDP_D_PERF_ENABLE_0_LUT_EN_SHIFT			_MK_SHIFT_CONST(1)
#define CDP_D_PERF_ENABLE_0_LUT_EN_FIELD			_MK_FIELD_CONST(0x1, CDP_D_PERF_ENABLE_0_LUT_EN_SHIFT)
#define CDP_D_PERF_ENABLE_0_LUT_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define CDP_D_PERF_ENABLE_0_LUT_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register CDP_D_PERF_WRITE_STALL_0
#define CDP_D_PERF_WRITE_STALL_0			_MK_ADDR_CONST(0xd0a0)
#define CDP_D_PERF_WRITE_STALL_0_PERF_WRITE_STALL_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_WRITE_STALL_0_PERF_WRITE_STALL_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_PERF_WRITE_STALL_0_PERF_WRITE_STALL_SHIFT)


// Register CDP_D_PERF_LUT_UFLOW_0
#define CDP_D_PERF_LUT_UFLOW_0			_MK_ADDR_CONST(0xd0a4)
#define CDP_D_PERF_LUT_UFLOW_0_PERF_LUT_UFLOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_LUT_UFLOW_0_PERF_LUT_UFLOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_PERF_LUT_UFLOW_0_PERF_LUT_UFLOW_SHIFT)


// Register CDP_D_PERF_LUT_OFLOW_0
#define CDP_D_PERF_LUT_OFLOW_0			_MK_ADDR_CONST(0xd0a8)
#define CDP_D_PERF_LUT_OFLOW_0_PERF_LUT_OFLOW_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_LUT_OFLOW_0_PERF_LUT_OFLOW_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_PERF_LUT_OFLOW_0_PERF_LUT_OFLOW_SHIFT)


// Register CDP_D_PERF_LUT_HYBRID_0
#define CDP_D_PERF_LUT_HYBRID_0			_MK_ADDR_CONST(0xd0ac)
#define CDP_D_PERF_LUT_HYBRID_0_PERF_LUT_HYBRID_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_LUT_HYBRID_0_PERF_LUT_HYBRID_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_PERF_LUT_HYBRID_0_PERF_LUT_HYBRID_SHIFT)


// Register CDP_D_PERF_LUT_LE_HIT_0
#define CDP_D_PERF_LUT_LE_HIT_0			_MK_ADDR_CONST(0xd0b0)
#define CDP_D_PERF_LUT_LE_HIT_0_PERF_LUT_LE_HIT_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_LUT_LE_HIT_0_PERF_LUT_LE_HIT_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_PERF_LUT_LE_HIT_0_PERF_LUT_LE_HIT_SHIFT)


// Register CDP_D_PERF_LUT_LO_HIT_0
#define CDP_D_PERF_LUT_LO_HIT_0			_MK_ADDR_CONST(0xd0b4)
#define CDP_D_PERF_LUT_LO_HIT_0_PERF_LUT_LO_HIT_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_PERF_LUT_LO_HIT_0_PERF_LUT_LO_HIT_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_PERF_LUT_LO_HIT_0_PERF_LUT_LO_HIT_SHIFT)


// Register CDP_D_CYA_0
#define CDP_D_CYA_0			_MK_ADDR_CONST(0xd0b8)
#define CDP_D_CYA_0_CYA_SHIFT			_MK_SHIFT_CONST(0)
#define CDP_D_CYA_0_CYA_FIELD			_MK_FIELD_CONST(0xffffffff, CDP_D_CYA_0_CYA_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register NVDLA_GEC_FEATURE_0
#define NVDLA_GEC_FEATURE_0			_MK_ADDR_CONST(0xe000)
#define NVDLA_GEC_FEATURE_0_NUM_ERR_SLICES_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_FEATURE_0_NUM_ERR_SLICES_FIELD			_MK_FIELD_CONST(0x3f, NVDLA_GEC_FEATURE_0_NUM_ERR_SLICES_SHIFT)
#define NVDLA_GEC_FEATURE_0_NUM_ERR_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_FEATURE_0_NUM_ERR_FIELD			_MK_FIELD_CONST(0xffff, NVDLA_GEC_FEATURE_0_NUM_ERR_SHIFT)


// Register NVDLA_GEC_SWRESET_0
#define NVDLA_GEC_SWRESET_0			_MK_ADDR_CONST(0xe004)
#define NVDLA_GEC_SWRESET_0_SWRST_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_SWRESET_0_SWRST_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_SWRESET_0_SWRST_SHIFT)


// Register NVDLA_GEC_MISSIONERR_TYPE_0
#define NVDLA_GEC_MISSIONERR_TYPE_0			_MK_ADDR_CONST(0xe008)
#define NVDLA_GEC_MISSIONERR_TYPE_0_CODE_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_MISSIONERR_TYPE_0_CODE_FIELD			_MK_FIELD_CONST(0x3f, NVDLA_GEC_MISSIONERR_TYPE_0_CODE_SHIFT)


// Register NVDLA_GEC_CURRENT_COUNTER_VALUE_0
#define NVDLA_GEC_CURRENT_COUNTER_VALUE_0			_MK_ADDR_CONST(0xe00c)
#define NVDLA_GEC_CURRENT_COUNTER_VALUE_0_VALUE_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_CURRENT_COUNTER_VALUE_0_VALUE_FIELD			_MK_FIELD_CONST(0x1ff, NVDLA_GEC_CURRENT_COUNTER_VALUE_0_VALUE_SHIFT)


// Register NVDLA_GEC_MISSIONERR_INDEX_0
#define NVDLA_GEC_MISSIONERR_INDEX_0			_MK_ADDR_CONST(0xe014)
#define NVDLA_GEC_MISSIONERR_INDEX_0_IDX_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_MISSIONERR_INDEX_0_IDX_FIELD			_MK_FIELD_CONST(0x7f, NVDLA_GEC_MISSIONERR_INDEX_0_IDX_SHIFT)


// Register NVDLA_GEC_CORRECTABLE_THRESHOLD_0
#define NVDLA_GEC_CORRECTABLE_THRESHOLD_0			_MK_ADDR_CONST(0xe018)
#define NVDLA_GEC_CORRECTABLE_THRESHOLD_0_COUNT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_CORRECTABLE_THRESHOLD_0_COUNT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_GEC_CORRECTABLE_THRESHOLD_0_COUNT_SHIFT)


// Register NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0
#define NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0			_MK_ADDR_CONST(0xe01c)
#define NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0_VALUE_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0_VALUE_FIELD			_MK_FIELD_CONST(0xff, NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0_VALUE_SHIFT)
#define NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0_VALUE_LOCK			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_MISSIONERR_INJECT_UNLOCK_0_VALUE_UNLOCK			_MK_ENUM_CONST(0xe1)


// Register NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0			_MK_ADDR_CONST(0xe030)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR0_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR0_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR1_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR1_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR2_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR2_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR3_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR3_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR4_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR4_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR5_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR5_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR6_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR6_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR7_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR7_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR8_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR8_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR9_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR9_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR10_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR10_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR11_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR11_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR12_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR12_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR13_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR13_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR14_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR14_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR15_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR15_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR16_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR16_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR17_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR17_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR18_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR18_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR19_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR19_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR20_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR20_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR21_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR21_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR22_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR22_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR23_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR23_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR24_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR24_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR25_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR25_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR26_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR26_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR27_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR27_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR28_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR28_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR29_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR29_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR30_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR30_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR31_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR31_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_ENABLE_0_ERR31_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0			_MK_ADDR_CONST(0xe034)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR0_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR0_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR1_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR1_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR2_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR2_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR3_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR3_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR4_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR4_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR5_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR5_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR6_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR6_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR7_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR7_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR8_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR8_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR9_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR9_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR10_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR10_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR11_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR11_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR12_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR12_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR13_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR13_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR14_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR14_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR15_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR15_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR16_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR16_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR17_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR17_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR18_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR18_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR19_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR19_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR20_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR20_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR21_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR21_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR22_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR22_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR23_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR23_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR24_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR24_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR25_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR25_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR26_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR26_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR27_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR27_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR28_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR28_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR29_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR29_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR30_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR30_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR31_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR31_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_FORCE_0_ERR31_FORCE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0			_MK_ADDR_CONST(0xe038)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_STATUS_0_ERR31_SHIFT)


// Register NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0			_MK_ADDR_CONST(0xe03c)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR0_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR0_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR1_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR1_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR2_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR2_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR3_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR3_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR4_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR4_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR5_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR5_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR6_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR6_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR7_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR7_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR8_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR8_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR15_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR15_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR16_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR16_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR17_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR17_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR18_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR18_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR19_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR19_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR20_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR20_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR21_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR21_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR22_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR22_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR23_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR23_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR24_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR24_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR25_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR25_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR26_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR26_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR27_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR27_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR28_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR28_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR29_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR29_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR30_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR30_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR31_SHIFT)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR31_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_MISSIONERR_INJECT_0_ERR31_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0			_MK_ADDR_CONST(0xe040)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR0_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR0_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR1_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR1_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR2_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR2_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR3_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR3_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR4_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR4_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR5_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR5_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR6_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR6_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR7_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR7_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR8_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR8_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR9_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR9_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR10_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR10_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR11_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR11_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR12_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR12_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR13_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR13_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR14_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR14_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR15_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR15_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR16_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR16_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR17_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR17_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR18_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR18_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR19_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR19_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR20_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR20_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR21_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR21_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR22_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR22_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR23_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR23_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR24_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR24_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR25_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR25_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR26_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR26_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR27_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR27_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR28_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR28_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR29_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR29_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR30_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR30_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR31_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR31_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_ENABLE_0_ERR31_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0			_MK_ADDR_CONST(0xe044)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR0_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR0_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR1_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR1_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR2_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR2_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR3_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR3_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR4_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR4_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR5_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR5_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR6_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR6_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR7_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR7_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR8_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR8_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR9_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR9_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR10_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR10_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR11_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR11_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR12_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR12_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR13_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR13_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR14_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR14_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR15_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR15_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR16_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR16_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR17_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR17_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR18_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR18_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR19_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR19_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR20_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR20_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR21_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR21_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR22_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR22_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR23_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR23_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR24_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR24_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR25_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR25_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR26_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR26_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR27_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR27_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR28_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR28_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR29_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR29_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR30_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR30_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR31_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR31_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_FORCE_0_ERR31_FORCE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0			_MK_ADDR_CONST(0xe048)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_LATENTERR_STATUS_0_ERR31_SHIFT)


// Register NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0			_MK_ADDR_CONST(0xe050)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR0_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR0_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR0_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR0_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR0_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR1_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR1_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR1_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR1_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR1_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR2_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR2_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR2_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR2_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR2_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR3_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR3_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR3_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR3_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR3_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR4_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR4_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR4_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR4_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR4_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR5_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR5_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR5_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR5_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR5_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR6_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR6_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR6_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR6_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR6_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR7_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR7_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR7_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR7_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR7_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR8_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR8_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR8_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR8_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR8_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR9_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR9_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR9_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR9_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR9_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR10_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR10_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR10_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR10_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR10_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR11_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR11_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR11_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR11_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR11_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR12_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR12_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR12_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR12_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR12_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR13_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR13_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR13_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR13_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR13_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR14_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR14_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR14_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR14_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR14_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR15_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR15_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR15_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR15_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR15_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR16_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR16_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR16_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR16_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR16_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR17_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR17_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR17_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR17_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR17_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR18_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR18_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR18_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR18_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR18_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR19_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR19_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR19_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR19_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR19_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR20_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR20_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR20_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR20_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR20_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR21_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR21_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR21_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR21_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR21_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR22_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR22_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR22_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR22_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR22_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR23_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR23_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR23_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR23_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR23_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR24_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR24_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR24_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR24_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR24_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR25_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR25_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR25_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR25_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR25_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR26_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR26_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR26_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR26_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR26_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR27_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR27_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR27_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR27_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR27_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR28_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR28_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR28_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR28_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR28_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR29_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR29_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR29_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR29_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR29_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR30_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR30_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR30_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR30_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR30_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR31_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR31_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR31_SHIFT)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR31_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE0_COUNTER_RELOAD_0_ERR31_RELOAD			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0			_MK_ADDR_CONST(0xe060)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR32_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR32_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR33_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR33_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR34_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR34_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR35_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR35_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR36_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR36_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR37_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR37_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR38_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR38_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR39_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR39_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR40_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR40_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR41_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR41_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR42_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR42_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR43_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR43_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR44_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR44_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR45_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR45_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR46_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR46_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR47_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR47_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR48_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR48_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR49_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR49_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR50_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR50_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR51_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR51_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR52_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR52_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR53_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR53_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR54_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR54_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR55_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR55_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR56_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR56_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR57_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR57_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR58_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR58_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR59_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR59_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR60_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR60_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR61_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR61_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR62_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR62_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR63_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ENABLE_0_ERR63_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0			_MK_ADDR_CONST(0xe064)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR32_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR32_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR33_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR33_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR34_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR34_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR35_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR35_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR36_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR36_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR37_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR37_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR38_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR38_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR39_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR39_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR40_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR40_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR41_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR41_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR42_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR42_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR43_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR43_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR44_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR44_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR45_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR45_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR46_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR46_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR47_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR47_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR48_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR48_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR49_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR49_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR50_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR50_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR51_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR51_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR52_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR52_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR53_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR53_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR54_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR54_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR55_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR55_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR56_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR56_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR57_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR57_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR58_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR58_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR59_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR59_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR60_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR60_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR61_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR61_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR62_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR62_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR63_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_FORCE_0_ERR63_FORCE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0			_MK_ADDR_CONST(0xe068)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_STATUS_0_ERR63_SHIFT)


// Register NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0			_MK_ADDR_CONST(0xe06c)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR32_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR32_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR33_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR33_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR34_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR34_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR35_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR35_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR36_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR36_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR37_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR37_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR38_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR38_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR39_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR39_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR40_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR40_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR41_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR41_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR42_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR42_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR43_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR43_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR44_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR44_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR45_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR45_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR46_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR46_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR47_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR47_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR48_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR48_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR49_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR49_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR50_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR50_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR51_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR51_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR52_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR52_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR53_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR53_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR54_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR54_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR55_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR55_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR56_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR56_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR57_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR57_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR58_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR58_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR59_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR59_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR60_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR60_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR61_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR61_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR62_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR62_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR63_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_INJECT_0_ERR63_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0			_MK_ADDR_CONST(0xe070)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR32_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR32_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR33_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR33_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR34_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR34_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR35_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR35_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR36_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR36_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR37_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR37_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR38_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR38_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR39_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR39_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR40_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR40_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR41_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR41_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR42_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR42_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR43_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR43_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR44_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR44_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR45_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR45_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR46_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR46_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR47_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR47_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR48_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR48_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR49_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR49_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR50_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR50_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR51_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR51_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR52_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR52_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR53_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR53_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR54_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR54_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR55_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR55_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR56_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR56_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR57_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR57_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR58_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR58_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR59_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR59_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR60_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR60_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR61_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR61_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR62_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR62_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR63_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_ENABLE_0_ERR63_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0			_MK_ADDR_CONST(0xe074)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR32_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR32_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR33_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR33_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR34_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR34_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR35_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR35_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR36_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR36_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR37_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR37_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR38_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR38_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR39_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR39_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR40_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR40_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR41_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR41_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR42_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR42_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR43_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR43_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR44_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR44_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR45_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR45_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR46_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR46_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR47_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR47_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR48_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR48_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR49_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR49_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR50_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR50_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR51_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR51_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR52_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR52_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR53_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR53_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR54_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR54_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR55_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR55_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR56_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR56_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR57_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR57_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR58_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR58_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR59_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR59_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR60_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR60_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR61_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR61_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR62_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR62_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR63_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_FORCE_0_ERR63_FORCE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0			_MK_ADDR_CONST(0xe078)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_LATENTERR_STATUS_0_ERR63_SHIFT)


// Register NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0			_MK_ADDR_CONST(0xe080)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR32_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR32_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR32_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR32_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR32_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR33_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR33_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR33_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR33_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR33_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR34_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR34_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR34_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR34_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR34_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR35_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR35_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR35_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR35_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR35_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR36_SHIFT			_MK_SHIFT_CONST(4)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR36_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR36_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR36_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR36_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR37_SHIFT			_MK_SHIFT_CONST(5)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR37_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR37_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR37_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR37_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR38_SHIFT			_MK_SHIFT_CONST(6)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR38_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR38_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR38_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR38_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR39_SHIFT			_MK_SHIFT_CONST(7)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR39_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR39_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR39_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR39_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR40_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR40_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR40_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR40_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR40_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR41_SHIFT			_MK_SHIFT_CONST(9)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR41_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR41_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR41_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR41_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR42_SHIFT			_MK_SHIFT_CONST(10)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR42_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR42_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR42_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR42_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR43_SHIFT			_MK_SHIFT_CONST(11)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR43_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR43_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR43_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR43_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR44_SHIFT			_MK_SHIFT_CONST(12)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR44_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR44_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR44_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR44_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR45_SHIFT			_MK_SHIFT_CONST(13)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR45_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR45_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR45_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR45_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR46_SHIFT			_MK_SHIFT_CONST(14)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR46_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR46_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR46_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR46_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR47_SHIFT			_MK_SHIFT_CONST(15)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR47_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR47_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR47_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR47_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR48_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR48_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR48_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR48_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR48_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR49_SHIFT			_MK_SHIFT_CONST(17)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR49_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR49_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR49_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR49_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR50_SHIFT			_MK_SHIFT_CONST(18)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR50_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR50_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR50_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR50_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR51_SHIFT			_MK_SHIFT_CONST(19)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR51_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR51_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR51_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR51_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR52_SHIFT			_MK_SHIFT_CONST(20)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR52_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR52_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR52_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR52_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR53_SHIFT			_MK_SHIFT_CONST(21)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR53_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR53_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR53_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR53_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR54_SHIFT			_MK_SHIFT_CONST(22)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR54_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR54_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR54_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR54_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR55_SHIFT			_MK_SHIFT_CONST(23)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR55_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR55_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR55_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR55_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR56_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR56_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR56_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR56_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR56_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR57_SHIFT			_MK_SHIFT_CONST(25)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR57_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR57_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR57_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR57_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR58_SHIFT			_MK_SHIFT_CONST(26)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR58_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR58_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR58_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR58_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR59_SHIFT			_MK_SHIFT_CONST(27)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR59_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR59_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR59_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR59_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR60_SHIFT			_MK_SHIFT_CONST(28)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR60_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR60_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR60_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR60_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR61_SHIFT			_MK_SHIFT_CONST(29)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR61_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR61_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR61_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR61_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR62_SHIFT			_MK_SHIFT_CONST(30)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR62_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR62_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR62_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR62_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR63_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_COUNTER_RELOAD_0_ERR63_RELOAD			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0			_MK_ADDR_CONST(0xe084)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0_ERR63_SHIFT			_MK_SHIFT_CONST(31)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0_ERR63_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0_ERR63_SHIFT)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0_ERR63_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE1_MISSIONERR_ECC_CORRECTION_DIS_0_ERR63_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0			_MK_ADDR_CONST(0xe090)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR64_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR64_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR65_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR65_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR66_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR66_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR67_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR67_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_ENABLE_0_ERR67_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0			_MK_ADDR_CONST(0xe094)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR64_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR64_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR65_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR65_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR66_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR66_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR67_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR67_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_FORCE_0_ERR67_FORCE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0			_MK_ADDR_CONST(0xe098)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_STATUS_0_ERR67_SHIFT)


// Register NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0			_MK_ADDR_CONST(0xe09c)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR64_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR64_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR65_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_MISSIONERR_INJECT_0_ERR65_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0			_MK_ADDR_CONST(0xe0a0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR64_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR64_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR65_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR65_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR66_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR66_ENABLE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR67_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR67_DISABLE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_ENABLE_0_ERR67_ENABLE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0			_MK_ADDR_CONST(0xe0a4)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR64_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR64_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR65_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR65_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR66_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR66_FORCE			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR67_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR67_NOFORCE			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_FORCE_0_ERR67_FORCE			_MK_ENUM_CONST(0x1)


// Register NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0			_MK_ADDR_CONST(0xe0a8)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_LATENTERR_STATUS_0_ERR67_SHIFT)


// Register NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0			_MK_ADDR_CONST(0xe0b0)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR64_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR64_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR64_SHIFT)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR64_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR64_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR65_SHIFT			_MK_SHIFT_CONST(1)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR65_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR65_SHIFT)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR65_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR65_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR66_SHIFT			_MK_SHIFT_CONST(2)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR66_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR66_SHIFT)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR66_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR66_RELOAD			_MK_ENUM_CONST(0x1)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR67_SHIFT			_MK_SHIFT_CONST(3)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR67_FIELD			_MK_FIELD_CONST(0x1, NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR67_SHIFT)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR67_NORELOAD			_MK_ENUM_CONST(0x0)
#define NVDLA_GEC_ERRSLICE2_COUNTER_RELOAD_0_ERR67_RELOAD			_MK_ENUM_CONST(0x1)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register NVDLA_CVIF_CFG_RD_WEIGHT_0_0
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0			_MK_ADDR_CONST(0xf000)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_BDMA_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_BDMA_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_BDMA_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_SDP_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_SDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_SDP_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_PDP_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_PDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_PDP_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_CDP_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_CDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_0_0_RD_WEIGHT_CDP_SHIFT)


// Register NVDLA_CVIF_CFG_RD_WEIGHT_1_0
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0			_MK_ADDR_CONST(0xf004)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_B_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_B_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_B_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_N_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_N_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_N_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_E_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_E_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_SDP_E_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_CDMA_DAT_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_CDMA_DAT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_1_0_RD_WEIGHT_CDMA_DAT_SHIFT)


// Register NVDLA_CVIF_CFG_RD_WEIGHT_2_0
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0			_MK_ADDR_CONST(0xf008)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_CDMA_WT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_CDMA_WT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_CDMA_WT_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RBK_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RBK_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RBK_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_1_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_1_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_1_SHIFT)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_0_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_0_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_RD_WEIGHT_2_0_RD_WEIGHT_RSV_0_SHIFT)


// Register NVDLA_CVIF_CFG_WR_WEIGHT_0_0
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0			_MK_ADDR_CONST(0xf00c)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_BDMA_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_BDMA_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_BDMA_SHIFT)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_SDP_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_SDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_SDP_SHIFT)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_PDP_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_PDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_PDP_SHIFT)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_CDP_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_CDP_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_0_0_WR_WEIGHT_CDP_SHIFT)


// Register NVDLA_CVIF_CFG_WR_WEIGHT_1_0
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0			_MK_ADDR_CONST(0xf010)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RBK_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RBK_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RBK_SHIFT)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_2_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_2_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_2_SHIFT)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_1_SHIFT			_MK_SHIFT_CONST(16)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_1_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_1_SHIFT)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_0_SHIFT			_MK_SHIFT_CONST(24)
#define NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_0_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_WR_WEIGHT_1_0_WR_WEIGHT_RSV_0_SHIFT)


// Register NVDLA_CVIF_CFG_OUTSTANDING_CNT_0
#define NVDLA_CVIF_CFG_OUTSTANDING_CNT_0			_MK_ADDR_CONST(0xf014)
#define NVDLA_CVIF_CFG_OUTSTANDING_CNT_0_RD_OS_CNT_SHIFT			_MK_SHIFT_CONST(0)
#define NVDLA_CVIF_CFG_OUTSTANDING_CNT_0_RD_OS_CNT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_OUTSTANDING_CNT_0_RD_OS_CNT_SHIFT)
#define NVDLA_CVIF_CFG_OUTSTANDING_CNT_0_WR_OS_CNT_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_CFG_OUTSTANDING_CNT_0_WR_OS_CNT_FIELD			_MK_FIELD_CONST(0xff, NVDLA_CVIF_CFG_OUTSTANDING_CNT_0_WR_OS_CNT_SHIFT)


// Register NVDLA_CVIF_STATUS_0
#define NVDLA_CVIF_STATUS_0			_MK_ADDR_CONST(0xf018)
#define NVDLA_CVIF_STATUS_0_IDLE_SHIFT			_MK_SHIFT_CONST(8)
#define NVDLA_CVIF_STATUS_0_IDLE_FIELD			_MK_FIELD_CONST(0x1, NVDLA_CVIF_STATUS_0_IDLE_SHIFT)
#define NVDLA_CVIF_STATUS_0_IDLE_NO			_MK_ENUM_CONST(0x0)
#define NVDLA_CVIF_STATUS_0_IDLE_YES			_MK_ENUM_CONST(0x1)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register BDMA_CFG_SRC_ADDR_LOW_0
#define BDMA_CFG_SRC_ADDR_LOW_0			_MK_ADDR_CONST(0x10000)
#define BDMA_CFG_SRC_ADDR_LOW_0_V32_SHIFT			_MK_SHIFT_CONST(5)
#define BDMA_CFG_SRC_ADDR_LOW_0_V32_FIELD			_MK_FIELD_CONST(0x7ffffff, BDMA_CFG_SRC_ADDR_LOW_0_V32_SHIFT)


// Register BDMA_CFG_SRC_ADDR_HIGH_0
#define BDMA_CFG_SRC_ADDR_HIGH_0			_MK_ADDR_CONST(0x10004)
#define BDMA_CFG_SRC_ADDR_HIGH_0_V8_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_SRC_ADDR_HIGH_0_V8_FIELD			_MK_FIELD_CONST(0xffffffff, BDMA_CFG_SRC_ADDR_HIGH_0_V8_SHIFT)


// Register BDMA_CFG_DST_ADDR_LOW_0
#define BDMA_CFG_DST_ADDR_LOW_0			_MK_ADDR_CONST(0x10008)
#define BDMA_CFG_DST_ADDR_LOW_0_V32_SHIFT			_MK_SHIFT_CONST(5)
#define BDMA_CFG_DST_ADDR_LOW_0_V32_FIELD			_MK_FIELD_CONST(0x7ffffff, BDMA_CFG_DST_ADDR_LOW_0_V32_SHIFT)


// Register BDMA_CFG_DST_ADDR_HIGH_0
#define BDMA_CFG_DST_ADDR_HIGH_0			_MK_ADDR_CONST(0x1000c)
#define BDMA_CFG_DST_ADDR_HIGH_0_V8_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_DST_ADDR_HIGH_0_V8_FIELD			_MK_FIELD_CONST(0xffffffff, BDMA_CFG_DST_ADDR_HIGH_0_V8_SHIFT)


// Register BDMA_CFG_LINE_0
#define BDMA_CFG_LINE_0			_MK_ADDR_CONST(0x10010)
#define BDMA_CFG_LINE_0_SIZE_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_LINE_0_SIZE_FIELD			_MK_FIELD_CONST(0x1fff, BDMA_CFG_LINE_0_SIZE_SHIFT)


// Register BDMA_CFG_CMD_0
#define BDMA_CFG_CMD_0			_MK_ADDR_CONST(0x10014)
#define BDMA_CFG_CMD_0_SRC_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_CMD_0_SRC_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, BDMA_CFG_CMD_0_SRC_RAM_TYPE_SHIFT)
#define BDMA_CFG_CMD_0_SRC_RAM_TYPE_CVSRAM			_MK_ENUM_CONST(0x0)
#define BDMA_CFG_CMD_0_SRC_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)
#define BDMA_CFG_CMD_0_DST_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(1)
#define BDMA_CFG_CMD_0_DST_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, BDMA_CFG_CMD_0_DST_RAM_TYPE_SHIFT)
#define BDMA_CFG_CMD_0_DST_RAM_TYPE_CVSRAM			_MK_ENUM_CONST(0x0)
#define BDMA_CFG_CMD_0_DST_RAM_TYPE_MC			_MK_ENUM_CONST(0x1)


// Register BDMA_CFG_LINE_REPEAT_0
#define BDMA_CFG_LINE_REPEAT_0			_MK_ADDR_CONST(0x10018)
#define BDMA_CFG_LINE_REPEAT_0_NUMBER_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_LINE_REPEAT_0_NUMBER_FIELD			_MK_FIELD_CONST(0xffffff, BDMA_CFG_LINE_REPEAT_0_NUMBER_SHIFT)


// Register BDMA_CFG_SRC_LINE_0
#define BDMA_CFG_SRC_LINE_0			_MK_ADDR_CONST(0x1001c)
#define BDMA_CFG_SRC_LINE_0_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define BDMA_CFG_SRC_LINE_0_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, BDMA_CFG_SRC_LINE_0_STRIDE_SHIFT)


// Register BDMA_CFG_DST_LINE_0
#define BDMA_CFG_DST_LINE_0			_MK_ADDR_CONST(0x10020)
#define BDMA_CFG_DST_LINE_0_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define BDMA_CFG_DST_LINE_0_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, BDMA_CFG_DST_LINE_0_STRIDE_SHIFT)


// Register BDMA_CFG_SURF_REPEAT_0
#define BDMA_CFG_SURF_REPEAT_0			_MK_ADDR_CONST(0x10024)
#define BDMA_CFG_SURF_REPEAT_0_NUMBER_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_SURF_REPEAT_0_NUMBER_FIELD			_MK_FIELD_CONST(0xffffff, BDMA_CFG_SURF_REPEAT_0_NUMBER_SHIFT)


// Register BDMA_CFG_SRC_SURF_0
#define BDMA_CFG_SRC_SURF_0			_MK_ADDR_CONST(0x10028)
#define BDMA_CFG_SRC_SURF_0_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define BDMA_CFG_SRC_SURF_0_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, BDMA_CFG_SRC_SURF_0_STRIDE_SHIFT)


// Register BDMA_CFG_DST_SURF_0
#define BDMA_CFG_DST_SURF_0			_MK_ADDR_CONST(0x1002c)
#define BDMA_CFG_DST_SURF_0_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define BDMA_CFG_DST_SURF_0_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, BDMA_CFG_DST_SURF_0_STRIDE_SHIFT)


// Register BDMA_CFG_OP_0
#define BDMA_CFG_OP_0			_MK_ADDR_CONST(0x10030)
#define BDMA_CFG_OP_0_EN_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_OP_0_EN_FIELD			_MK_FIELD_CONST(0x1, BDMA_CFG_OP_0_EN_SHIFT)
#define BDMA_CFG_OP_0_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define BDMA_CFG_OP_0_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register BDMA_CFG_LAUNCH0_0
#define BDMA_CFG_LAUNCH0_0			_MK_ADDR_CONST(0x10034)
#define BDMA_CFG_LAUNCH0_0_GRP0_LAUNCH_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_LAUNCH0_0_GRP0_LAUNCH_FIELD			_MK_FIELD_CONST(0x1, BDMA_CFG_LAUNCH0_0_GRP0_LAUNCH_SHIFT)
#define BDMA_CFG_LAUNCH0_0_GRP0_LAUNCH_NO			_MK_ENUM_CONST(0x0)
#define BDMA_CFG_LAUNCH0_0_GRP0_LAUNCH_YES			_MK_ENUM_CONST(0x1)


// Register BDMA_CFG_LAUNCH1_0
#define BDMA_CFG_LAUNCH1_0			_MK_ADDR_CONST(0x10038)
#define BDMA_CFG_LAUNCH1_0_GRP1_LAUNCH_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_LAUNCH1_0_GRP1_LAUNCH_FIELD			_MK_FIELD_CONST(0x1, BDMA_CFG_LAUNCH1_0_GRP1_LAUNCH_SHIFT)
#define BDMA_CFG_LAUNCH1_0_GRP1_LAUNCH_NO			_MK_ENUM_CONST(0x0)
#define BDMA_CFG_LAUNCH1_0_GRP1_LAUNCH_YES			_MK_ENUM_CONST(0x1)


// Register BDMA_CFG_STATUS_0
#define BDMA_CFG_STATUS_0			_MK_ADDR_CONST(0x1003c)
#define BDMA_CFG_STATUS_0_STALL_COUNT_EN_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_CFG_STATUS_0_STALL_COUNT_EN_FIELD			_MK_FIELD_CONST(0x1, BDMA_CFG_STATUS_0_STALL_COUNT_EN_SHIFT)
#define BDMA_CFG_STATUS_0_STALL_COUNT_EN_NO			_MK_ENUM_CONST(0x0)
#define BDMA_CFG_STATUS_0_STALL_COUNT_EN_YES			_MK_ENUM_CONST(0x1)


// Register BDMA_STATUS_0
#define BDMA_STATUS_0			_MK_ADDR_CONST(0x10040)
#define BDMA_STATUS_0_FREE_SLOT_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_STATUS_0_FREE_SLOT_FIELD			_MK_FIELD_CONST(0xff, BDMA_STATUS_0_FREE_SLOT_SHIFT)
#define BDMA_STATUS_0_IDLE_SHIFT			_MK_SHIFT_CONST(8)
#define BDMA_STATUS_0_IDLE_FIELD			_MK_FIELD_CONST(0x1, BDMA_STATUS_0_IDLE_SHIFT)
#define BDMA_STATUS_0_IDLE_NO			_MK_ENUM_CONST(0x0)
#define BDMA_STATUS_0_IDLE_YES			_MK_ENUM_CONST(0x1)
#define BDMA_STATUS_0_GRP0_BUSY_SHIFT			_MK_SHIFT_CONST(9)
#define BDMA_STATUS_0_GRP0_BUSY_FIELD			_MK_FIELD_CONST(0x1, BDMA_STATUS_0_GRP0_BUSY_SHIFT)
#define BDMA_STATUS_0_GRP0_BUSY_NO			_MK_ENUM_CONST(0x0)
#define BDMA_STATUS_0_GRP0_BUSY_YES			_MK_ENUM_CONST(0x1)
#define BDMA_STATUS_0_GRP1_BUSY_SHIFT			_MK_SHIFT_CONST(10)
#define BDMA_STATUS_0_GRP1_BUSY_FIELD			_MK_FIELD_CONST(0x1, BDMA_STATUS_0_GRP1_BUSY_SHIFT)
#define BDMA_STATUS_0_GRP1_BUSY_NO			_MK_ENUM_CONST(0x0)
#define BDMA_STATUS_0_GRP1_BUSY_YES			_MK_ENUM_CONST(0x1)


// Register BDMA_STATUS_GRP0_READ_STALL_0
#define BDMA_STATUS_GRP0_READ_STALL_0			_MK_ADDR_CONST(0x10044)
#define BDMA_STATUS_GRP0_READ_STALL_0_COUNT_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_STATUS_GRP0_READ_STALL_0_COUNT_FIELD			_MK_FIELD_CONST(0xffffffff, BDMA_STATUS_GRP0_READ_STALL_0_COUNT_SHIFT)


// Register BDMA_STATUS_GRP0_WRITE_STALL_0
#define BDMA_STATUS_GRP0_WRITE_STALL_0			_MK_ADDR_CONST(0x10048)
#define BDMA_STATUS_GRP0_WRITE_STALL_0_COUNT_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_STATUS_GRP0_WRITE_STALL_0_COUNT_FIELD			_MK_FIELD_CONST(0xffffffff, BDMA_STATUS_GRP0_WRITE_STALL_0_COUNT_SHIFT)


// Register BDMA_STATUS_GRP1_READ_STALL_0
#define BDMA_STATUS_GRP1_READ_STALL_0			_MK_ADDR_CONST(0x1004c)
#define BDMA_STATUS_GRP1_READ_STALL_0_COUNT_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_STATUS_GRP1_READ_STALL_0_COUNT_FIELD			_MK_FIELD_CONST(0xffffffff, BDMA_STATUS_GRP1_READ_STALL_0_COUNT_SHIFT)


// Register BDMA_STATUS_GRP1_WRITE_STALL_0
#define BDMA_STATUS_GRP1_WRITE_STALL_0			_MK_ADDR_CONST(0x10050)
#define BDMA_STATUS_GRP1_WRITE_STALL_0_COUNT_SHIFT			_MK_SHIFT_CONST(0)
#define BDMA_STATUS_GRP1_WRITE_STALL_0_COUNT_FIELD			_MK_FIELD_CONST(0xffffffff, BDMA_STATUS_GRP1_WRITE_STALL_0_COUNT_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif


// Register RBK_S_STATUS_0
#define RBK_S_STATUS_0			_MK_ADDR_CONST(0x11000)
#define RBK_S_STATUS_0_STATUS_0_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_S_STATUS_0_STATUS_0_FIELD			_MK_FIELD_CONST(0x3, RBK_S_STATUS_0_STATUS_0_SHIFT)
#define RBK_S_STATUS_0_STATUS_0_IDLE			_MK_ENUM_CONST(0x0)
#define RBK_S_STATUS_0_STATUS_0_RUNNING			_MK_ENUM_CONST(0x1)
#define RBK_S_STATUS_0_STATUS_0_PENDING			_MK_ENUM_CONST(0x2)
#define RBK_S_STATUS_0_STATUS_1_SHIFT			_MK_SHIFT_CONST(16)
#define RBK_S_STATUS_0_STATUS_1_FIELD			_MK_FIELD_CONST(0x3, RBK_S_STATUS_0_STATUS_1_SHIFT)
#define RBK_S_STATUS_0_STATUS_1_IDLE			_MK_ENUM_CONST(0x0)
#define RBK_S_STATUS_0_STATUS_1_RUNNING			_MK_ENUM_CONST(0x1)
#define RBK_S_STATUS_0_STATUS_1_PENDING			_MK_ENUM_CONST(0x2)


// Register RBK_S_POINTER_0
#define RBK_S_POINTER_0			_MK_ADDR_CONST(0x11004)
#define RBK_S_POINTER_0_PRODUCER_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_S_POINTER_0_PRODUCER_FIELD			_MK_FIELD_CONST(0x1, RBK_S_POINTER_0_PRODUCER_SHIFT)
#define RBK_S_POINTER_0_PRODUCER_GROUP_0			_MK_ENUM_CONST(0x0)
#define RBK_S_POINTER_0_PRODUCER_GROUP_1			_MK_ENUM_CONST(0x1)
#define RBK_S_POINTER_0_CONSUMER_SHIFT			_MK_SHIFT_CONST(16)
#define RBK_S_POINTER_0_CONSUMER_FIELD			_MK_FIELD_CONST(0x1, RBK_S_POINTER_0_CONSUMER_SHIFT)
#define RBK_S_POINTER_0_CONSUMER_GROUP_0			_MK_ENUM_CONST(0x0)
#define RBK_S_POINTER_0_CONSUMER_GROUP_1			_MK_ENUM_CONST(0x1)


// Register RBK_D_OP_ENABLE_0
#define RBK_D_OP_ENABLE_0			_MK_ADDR_CONST(0x11008)
#define RBK_D_OP_ENABLE_0_OP_EN_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_OP_ENABLE_0_OP_EN_FIELD			_MK_FIELD_CONST(0x1, RBK_D_OP_ENABLE_0_OP_EN_SHIFT)
#define RBK_D_OP_ENABLE_0_OP_EN_DISABLE			_MK_ENUM_CONST(0x0)
#define RBK_D_OP_ENABLE_0_OP_EN_ENABLE			_MK_ENUM_CONST(0x1)


// Register RBK_D_MISC_CFG_0
#define RBK_D_MISC_CFG_0			_MK_ADDR_CONST(0x1100c)
#define RBK_D_MISC_CFG_0_RUBIK_MODE_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_MISC_CFG_0_RUBIK_MODE_FIELD			_MK_FIELD_CONST(0x3, RBK_D_MISC_CFG_0_RUBIK_MODE_SHIFT)
#define RBK_D_MISC_CFG_0_RUBIK_MODE_CONTRACT			_MK_ENUM_CONST(0x0)
#define RBK_D_MISC_CFG_0_RUBIK_MODE_SPLIT			_MK_ENUM_CONST(0x1)
#define RBK_D_MISC_CFG_0_RUBIK_MODE_MERGE			_MK_ENUM_CONST(0x2)
#define RBK_D_MISC_CFG_0_IN_PRECISION_SHIFT			_MK_SHIFT_CONST(8)
#define RBK_D_MISC_CFG_0_IN_PRECISION_FIELD			_MK_FIELD_CONST(0x3, RBK_D_MISC_CFG_0_IN_PRECISION_SHIFT)
#define RBK_D_MISC_CFG_0_IN_PRECISION_INT8			_MK_ENUM_CONST(0x0)
#define RBK_D_MISC_CFG_0_IN_PRECISION_INT16			_MK_ENUM_CONST(0x1)
#define RBK_D_MISC_CFG_0_IN_PRECISION_FP16			_MK_ENUM_CONST(0x2)


// Register RBK_D_DAIN_RAM_TYPE_0
#define RBK_D_DAIN_RAM_TYPE_0			_MK_ADDR_CONST(0x11010)
#define RBK_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, RBK_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_SHIFT)
#define RBK_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_CVIF			_MK_ENUM_CONST(0x0)
#define RBK_D_DAIN_RAM_TYPE_0_DATAIN_RAM_TYPE_MCIF			_MK_ENUM_CONST(0x1)


// Register RBK_D_DATAIN_SIZE_0_0
#define RBK_D_DATAIN_SIZE_0_0			_MK_ADDR_CONST(0x11014)
#define RBK_D_DATAIN_SIZE_0_0_DATAIN_WIDTH_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DATAIN_SIZE_0_0_DATAIN_WIDTH_FIELD			_MK_FIELD_CONST(0x1fff, RBK_D_DATAIN_SIZE_0_0_DATAIN_WIDTH_SHIFT)
#define RBK_D_DATAIN_SIZE_0_0_DATAIN_HEIGHT_SHIFT			_MK_SHIFT_CONST(16)
#define RBK_D_DATAIN_SIZE_0_0_DATAIN_HEIGHT_FIELD			_MK_FIELD_CONST(0x1fff, RBK_D_DATAIN_SIZE_0_0_DATAIN_HEIGHT_SHIFT)


// Register RBK_D_DATAIN_SIZE_1_0
#define RBK_D_DATAIN_SIZE_1_0			_MK_ADDR_CONST(0x11018)
#define RBK_D_DATAIN_SIZE_1_0_DATAIN_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DATAIN_SIZE_1_0_DATAIN_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, RBK_D_DATAIN_SIZE_1_0_DATAIN_CHANNEL_SHIFT)


// Register RBK_D_DAIN_ADDR_HIGH_0
#define RBK_D_DAIN_ADDR_HIGH_0			_MK_ADDR_CONST(0x1101c)
#define RBK_D_DAIN_ADDR_HIGH_0_DAIN_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DAIN_ADDR_HIGH_0_DAIN_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, RBK_D_DAIN_ADDR_HIGH_0_DAIN_ADDR_HIGH_SHIFT)


// Register RBK_D_DAIN_ADDR_LOW_0
#define RBK_D_DAIN_ADDR_LOW_0			_MK_ADDR_CONST(0x11020)
#define RBK_D_DAIN_ADDR_LOW_0_DAIN_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAIN_ADDR_LOW_0_DAIN_ADDR_LOW_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAIN_ADDR_LOW_0_DAIN_ADDR_LOW_SHIFT)


// Register RBK_D_DAIN_LINE_STRIDE_0
#define RBK_D_DAIN_LINE_STRIDE_0			_MK_ADDR_CONST(0x11024)
#define RBK_D_DAIN_LINE_STRIDE_0_DAIN_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAIN_LINE_STRIDE_0_DAIN_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAIN_LINE_STRIDE_0_DAIN_LINE_STRIDE_SHIFT)


// Register RBK_D_DAIN_SURF_STRIDE_0
#define RBK_D_DAIN_SURF_STRIDE_0			_MK_ADDR_CONST(0x11028)
#define RBK_D_DAIN_SURF_STRIDE_0_DAIN_SURF_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAIN_SURF_STRIDE_0_DAIN_SURF_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAIN_SURF_STRIDE_0_DAIN_SURF_STRIDE_SHIFT)


// Register RBK_D_DAIN_PLANAR_STRIDE_0
#define RBK_D_DAIN_PLANAR_STRIDE_0			_MK_ADDR_CONST(0x1102c)
#define RBK_D_DAIN_PLANAR_STRIDE_0_DAIN_PLANAR_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAIN_PLANAR_STRIDE_0_DAIN_PLANAR_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAIN_PLANAR_STRIDE_0_DAIN_PLANAR_STRIDE_SHIFT)


// Register RBK_D_DAOUT_RAM_TYPE_0
#define RBK_D_DAOUT_RAM_TYPE_0			_MK_ADDR_CONST(0x11030)
#define RBK_D_DAOUT_RAM_TYPE_0_DATAOUT_RAM_TYPE_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DAOUT_RAM_TYPE_0_DATAOUT_RAM_TYPE_FIELD			_MK_FIELD_CONST(0x1, RBK_D_DAOUT_RAM_TYPE_0_DATAOUT_RAM_TYPE_SHIFT)
#define RBK_D_DAOUT_RAM_TYPE_0_DATAOUT_RAM_TYPE_CVIF			_MK_ENUM_CONST(0x0)
#define RBK_D_DAOUT_RAM_TYPE_0_DATAOUT_RAM_TYPE_MCIF			_MK_ENUM_CONST(0x1)


// Register RBK_D_DATAOUT_SIZE_1_0
#define RBK_D_DATAOUT_SIZE_1_0			_MK_ADDR_CONST(0x11034)
#define RBK_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_FIELD			_MK_FIELD_CONST(0x1fff, RBK_D_DATAOUT_SIZE_1_0_DATAOUT_CHANNEL_SHIFT)


// Register RBK_D_DAOUT_ADDR_HIGH_0
#define RBK_D_DAOUT_ADDR_HIGH_0			_MK_ADDR_CONST(0x11038)
#define RBK_D_DAOUT_ADDR_HIGH_0_DAOUT_ADDR_HIGH_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DAOUT_ADDR_HIGH_0_DAOUT_ADDR_HIGH_FIELD			_MK_FIELD_CONST(0xffffffff, RBK_D_DAOUT_ADDR_HIGH_0_DAOUT_ADDR_HIGH_SHIFT)


// Register RBK_D_DAOUT_ADDR_LOW_0
#define RBK_D_DAOUT_ADDR_LOW_0			_MK_ADDR_CONST(0x1103c)
#define RBK_D_DAOUT_ADDR_LOW_0_DAOUT_ADDR_LOW_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAOUT_ADDR_LOW_0_DAOUT_ADDR_LOW_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAOUT_ADDR_LOW_0_DAOUT_ADDR_LOW_SHIFT)


// Register RBK_D_DAOUT_LINE_STRIDE_0
#define RBK_D_DAOUT_LINE_STRIDE_0			_MK_ADDR_CONST(0x11040)
#define RBK_D_DAOUT_LINE_STRIDE_0_DAOUT_LINE_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAOUT_LINE_STRIDE_0_DAOUT_LINE_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAOUT_LINE_STRIDE_0_DAOUT_LINE_STRIDE_SHIFT)


// Register RBK_D_CONTRACT_STRIDE_0_0
#define RBK_D_CONTRACT_STRIDE_0_0			_MK_ADDR_CONST(0x11044)
#define RBK_D_CONTRACT_STRIDE_0_0_CONTRACT_STRIDE_0_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_CONTRACT_STRIDE_0_0_CONTRACT_STRIDE_0_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_CONTRACT_STRIDE_0_0_CONTRACT_STRIDE_0_SHIFT)


// Register RBK_D_CONTRACT_STRIDE_1_0
#define RBK_D_CONTRACT_STRIDE_1_0			_MK_ADDR_CONST(0x11048)
#define RBK_D_CONTRACT_STRIDE_1_0_CONTRACT_STRIDE_1_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_CONTRACT_STRIDE_1_0_CONTRACT_STRIDE_1_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_CONTRACT_STRIDE_1_0_CONTRACT_STRIDE_1_SHIFT)


// Register RBK_D_DAOUT_SURF_STRIDE_0
#define RBK_D_DAOUT_SURF_STRIDE_0			_MK_ADDR_CONST(0x1104c)
#define RBK_D_DAOUT_SURF_STRIDE_0_DAOUT_SURF_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAOUT_SURF_STRIDE_0_DAOUT_SURF_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAOUT_SURF_STRIDE_0_DAOUT_SURF_STRIDE_SHIFT)


// Register RBK_D_DAOUT_PLANAR_STRIDE_0
#define RBK_D_DAOUT_PLANAR_STRIDE_0			_MK_ADDR_CONST(0x11050)
#define RBK_D_DAOUT_PLANAR_STRIDE_0_DAOUT_PLANAR_STRIDE_SHIFT			_MK_SHIFT_CONST(5)
#define RBK_D_DAOUT_PLANAR_STRIDE_0_DAOUT_PLANAR_STRIDE_FIELD			_MK_FIELD_CONST(0x7ffffff, RBK_D_DAOUT_PLANAR_STRIDE_0_DAOUT_PLANAR_STRIDE_SHIFT)


// Register RBK_D_DECONV_STRIDE_0
#define RBK_D_DECONV_STRIDE_0			_MK_ADDR_CONST(0x11054)
#define RBK_D_DECONV_STRIDE_0_DECONV_X_STRIDE_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_DECONV_STRIDE_0_DECONV_X_STRIDE_FIELD			_MK_FIELD_CONST(0x1f, RBK_D_DECONV_STRIDE_0_DECONV_X_STRIDE_SHIFT)
#define RBK_D_DECONV_STRIDE_0_DECONV_Y_STRIDE_SHIFT			_MK_SHIFT_CONST(16)
#define RBK_D_DECONV_STRIDE_0_DECONV_Y_STRIDE_FIELD			_MK_FIELD_CONST(0x1f, RBK_D_DECONV_STRIDE_0_DECONV_Y_STRIDE_SHIFT)


// Register RBK_D_PERF_ENABLE_0
#define RBK_D_PERF_ENABLE_0			_MK_ADDR_CONST(0x11058)
#define RBK_D_PERF_ENABLE_0_PERF_EN_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_PERF_ENABLE_0_PERF_EN_FIELD			_MK_FIELD_CONST(0x1, RBK_D_PERF_ENABLE_0_PERF_EN_SHIFT)


// Register RBK_D_PERF_READ_STALL_0
#define RBK_D_PERF_READ_STALL_0			_MK_ADDR_CONST(0x1105c)
#define RBK_D_PERF_READ_STALL_0_RD_STALL_CNT_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_PERF_READ_STALL_0_RD_STALL_CNT_FIELD			_MK_FIELD_CONST(0xffffffff, RBK_D_PERF_READ_STALL_0_RD_STALL_CNT_SHIFT)


// Register RBK_D_PERF_WRITE_STALL_0
#define RBK_D_PERF_WRITE_STALL_0			_MK_ADDR_CONST(0x11060)
#define RBK_D_PERF_WRITE_STALL_0_WR_STALL_CNT_SHIFT			_MK_SHIFT_CONST(0)
#define RBK_D_PERF_WRITE_STALL_0_WR_STALL_CNT_FIELD			_MK_FIELD_CONST(0xffffffff, RBK_D_PERF_WRITE_STALL_0_WR_STALL_CNT_SHIFT)



// To satisfy various compilers and platforms,
// we let users control the types and syntax of certain constants, using macros.
#ifndef _MK_SHIFT_CONST
  #define _MK_SHIFT_CONST(_constant_) _constant_
#endif
#ifndef _MK_MASK_CONST
  #define _MK_MASK_CONST(_constant_) _constant_
#endif
#ifndef _MK_ENUM_CONST
  #define _MK_ENUM_CONST(_constant_) (_constant_ ## UL)
#endif
#ifndef _MK_ADDR_CONST
  #define _MK_ADDR_CONST(_constant_) _constant_
#endif
#ifndef _MK_FIELD_CONST
  #define _MK_FIELD_CONST(_mask_, _shift_) (_MK_MASK_CONST(_mask_) << _MK_SHIFT_CONST(_shift_))
#endif



//
// ADDRESS SPACES
//

#define BASE_ADDRESS_NVDLA_CFGROM	0x0
#define BASE_ADDRESS_NVDLA_GLB	0x1000
#define BASE_ADDRESS_NVDLA_MCIF	0x2000
#define BASE_ADDRESS_NVDLA_CDMA	0x3000
#define BASE_ADDRESS_NVDLA_CSC	0x4000
#define BASE_ADDRESS_NVDLA_CMAC_A	0x5000
#define BASE_ADDRESS_NVDLA_CMAC_B	0x6000
#define BASE_ADDRESS_NVDLA_CACC	0x7000
#define BASE_ADDRESS_NVDLA_SDP_RDMA	0x8000
#define BASE_ADDRESS_NVDLA_SDP	0x9000
#define BASE_ADDRESS_NVDLA_PDP_RDMA	0xa000
#define BASE_ADDRESS_NVDLA_PDP	0xb000
#define BASE_ADDRESS_NVDLA_CDP_RDMA	0xc000
#define BASE_ADDRESS_NVDLA_CDP	0xd000
#define BASE_ADDRESS_NVDLA_GEC	0xe000
#define BASE_ADDRESS_NVDLA_CVIF	0xf000
#define BASE_ADDRESS_NVDLA_BDMA	0x10000
#define BASE_ADDRESS_NVDLA_RBK	0x11000

#endif
