// Generated by CIRCT firtool-1.139.0

// Users can define 'STOP_COND' to add an extra gate to stop conditions.
`ifndef STOP_COND_
  `ifdef STOP_COND
    `define STOP_COND_ (`STOP_COND)
  `else  // STOP_COND
    `define STOP_COND_ 1
  `endif // STOP_COND
`endif // not def STOP_COND_

// Users can define 'ASSERT_VERBOSE_COND' to add an extra gate to assert error printing.
`ifndef ASSERT_VERBOSE_COND_
  `ifdef ASSERT_VERBOSE_COND
    `define ASSERT_VERBOSE_COND_ (`ASSERT_VERBOSE_COND)
  `else  // ASSERT_VERBOSE_COND
    `define ASSERT_VERBOSE_COND_ 1
  `endif // ASSERT_VERBOSE_COND
`endif // not def ASSERT_VERBOSE_COND_
module DCache_Verification_Assert();
  `ifndef SYNTHESIS
    always @(posedge DCache.clock) begin
      if (~DCache.reset & DCache.io_reqValid
          & (|((DCache._storeEndSet_T_6
                  ? 3'h0
                  : DCache._storeEndSet_T_4
                      ? 3'h4
                      : DCache._storeEndSet_T_2 ? 3'h2 : {2'h0, DCache._storeEndSet_T})
               - 3'h1 & DCache.io_req_addr[2:0]))) begin
        if (`ASSERT_VERBOSE_COND_)
          $error("Assertion failed: DCache received misaligned request; LSU must trap before DCache\n");
        if (`STOP_COND_)
          $fatal;
      end
    end // always @(posedge)
  `endif // not def SYNTHESIS
endmodule