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feat: implement privileged mode support

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This commit is contained in:
abnerhexu
2026-06-29 07:00:55 +00:00
parent a32db39c80
commit b6afa61e66
89 changed files with 49571 additions and 43647 deletions
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53
generated-ooo/PageTableWalker.sv
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@@ -5,6 +5,10 @@ module PageTableWalker(
io_reqValid,
input [26:0] io_reqVpn,
input io_isStore,
io_isFetch,
input [1:0] io_priv,
input io_sum,
io_mxr,
input [63:0] io_satp,
output io_memReq_valid,
output [63:0] io_memReq_addr,
@@ -14,6 +18,7 @@ module PageTableWalker(
io_refill_valid,
output [26:0] io_refill_vpn,
output [43:0] io_refill_ppn,
output [1:0] io_refill_level,
output [7:0] io_refill_flags,
output io_pageFault
);
@@ -21,20 +26,28 @@ module PageTableWalker(
reg [2:0] state;
reg [26:0] vpnReg;
reg isStoreReg;
reg walkFault;
reg [43:0] nextPpn;
reg isFetchReg;
reg [1:0] privReg;
reg sumReg;
reg mxrReg;
wire _io_memReq_addr_T = state == 3'h1;
wire _io_memReq_addr_T_1 = state == 3'h2;
reg walkFault;
reg [43:0] nextPpn;
reg [7:0] leafFlagsReg;
reg [1:0] leafLevelReg;
reg [43:0] curPpn;
wire _io_memReq_valid_T_3 = state == 3'h3;
wire io_respValid_0 = state == 3'h4;
always @(posedge clock) begin
automatic logic pteIsLeaf;
automatic logic invalidPte;
automatic logic _GEN;
automatic logic _GEN_0;
automatic logic _GEN_1;
automatic logic _GEN_2;
automatic logic [1:0] level;
automatic logic pteIsLeaf;
automatic logic invalidPte;
automatic logic _GEN;
automatic logic _GEN_0;
automatic logic _GEN_1;
automatic logic _GEN_2;
level = _io_memReq_addr_T ? 2'h2 : {1'h0, _io_memReq_addr_T_1};
pteIsLeaf = io_memResp_data[1] | io_memResp_data[3];
invalidPte = ~(io_memResp_data[0]) | ~(io_memResp_data[1]) & io_memResp_data[2];
_GEN = state == 3'h0;
@@ -60,25 +73,36 @@ module PageTableWalker(
& (_GEN_1
? invalidPte
| (pteIsLeaf
? (isStoreReg
? ~(io_memResp_data[2]) | ~(io_memResp_data[7])
: ~(io_memResp_data[1])) | ~(io_memResp_data[6]) | walkFault
? privReg == 2'h1 & io_memResp_data[4] & (isFetchReg | ~sumReg)
| privReg == 2'h0 & ~(io_memResp_data[4])
| ~(isFetchReg
? io_memResp_data[3]
: isStoreReg
? io_memResp_data[2] & io_memResp_data[7]
: io_memResp_data[1] | mxrReg & io_memResp_data[3])
| ~(io_memResp_data[6]) | level == 2'h2
& (|(io_memResp_data[27:10])) | level == 2'h1
& (|(io_memResp_data[18:10])) | walkFault
: ~_GEN_0 | walkFault)
: walkFault);
end
if (_GEN & io_reqValid) begin
vpnReg <= io_reqVpn;
isStoreReg <= io_isStore;
isFetchReg <= io_isFetch;
privReg <= io_priv;
sumReg <= io_sum;
mxrReg <= io_mxr;
end
if (_GEN | ~_GEN_1 | invalidPte | ~pteIsLeaf) begin
end
else begin
automatic logic [1:0] level =
_io_memReq_addr_T ? 2'h2 : {1'h0, _io_memReq_addr_T_1};
nextPpn <=
{io_memResp_data[53:28],
level[1] ? vpnReg[17:9] : io_memResp_data[27:19],
level == 2'h0 ? io_memResp_data[18:10] : vpnReg[8:0]};
leafFlagsReg <= io_memResp_data[7:0];
leafLevelReg <= level;
end
if (_GEN | ~_GEN_1 | _GEN_2) begin
end
@@ -96,7 +120,8 @@ module PageTableWalker(
assign io_refill_valid = io_respValid_0 & ~walkFault;
assign io_refill_vpn = vpnReg;
assign io_refill_ppn = nextPpn;
assign io_refill_flags = io_memResp_data[7:0];
assign io_refill_level = leafLevelReg;
assign io_refill_flags = leafFlagsReg;
assign io_pageFault = walkFault;
endmodule