fix: resolve OoO simulation timeout

2026-06-27 03:38:34 +00:00
parent 502803c37f
commit a2e0126199
68 changed files with 78250 additions and 210 deletions
--- a/generated-ooo/verification/OoOBackend_Verification.sv
+++ b/generated-ooo/verification/OoOBackend_Verification.sv
@@ -0,0 +1,38 @@
+// Generated by CIRCT firtool-1.139.0
+
+// Users can define 'PRINTF_COND' to add an extra gate to prints.
+`ifndef PRINTF_COND_
+  `ifdef PRINTF_COND
+    `define PRINTF_COND_ (`PRINTF_COND)
+  `else  // PRINTF_COND
+    `define PRINTF_COND_ 1
+  `endif // PRINTF_COND
+`endif // not def PRINTF_COND_
+module OoOBackend_Verification();
+  `ifndef SYNTHESIS
+    always @(posedge OoOBackend.clock) begin
+      automatic logic [63:0] _GEN;
+      _GEN =
+        OoOBackend.memSlot
+          ? OoOBackend.issue_io_out_1_decoded_pc
+          : OoOBackend.issue_io_out_0_decoded_pc;
+      if ((`PRINTF_COND_) & OoOBackend._storeEnq_T & _GEN < 64'h80000050
+          & ~OoOBackend.reset)
+        $fwrite(32'h80000002,
+                "[mem-issue] pc=0x%x inst=0x%x isLoad=%d isStore=%d prs1=%d src1=0x%x immS=0x%x addr=0x%x ready=%d\n",
+                _GEN,
+                OoOBackend.memSlot
+                  ? OoOBackend.issue_io_out_1_decoded_inst
+                  : OoOBackend.issue_io_out_0_decoded_inst, OoOBackend._layer_probe_0,
+                OoOBackend._layer_probe_1,
+                OoOBackend.memSlot
+                  ? OoOBackend.issue_io_out_1_prs1
+                  : OoOBackend.issue_io_out_0_prs1, OoOBackend.memSrc1,
+                OoOBackend._layer_probe, OoOBackend.memAddr,
+                OoOBackend.memSlot
+                  ? OoOBackend.issue_io_outReady_1
+                  : OoOBackend.issue_io_outReady_0);
+    end // always @(posedge)
+  `endif // not def SYNTHESIS
+endmodule
+