fix: resolve OoO simulation timeout
This commit is contained in:
abnerhexu
266
generated-ooo/IssueQueue.sv
Normal file
266
generated-ooo/IssueQueue.sv
Normal file
@@ -0,0 +1,266 @@
|
||||
// Generated by CIRCT firtool-1.139.0
|
||||
module IssueQueue(
|
||||
input clock,
|
||||
reset,
|
||||
io_enqValid_0,
|
||||
io_enqValid_1,
|
||||
input [63:0] io_enq_0_decoded_pc,
|
||||
input [31:0] io_enq_0_decoded_inst,
|
||||
input [4:0] io_enq_0_decoded_rs1,
|
||||
io_enq_0_decoded_rs2,
|
||||
input [2:0] io_enq_0_decoded_funct3,
|
||||
input [63:0] io_enq_0_decoded_immI,
|
||||
io_enq_0_decoded_immS,
|
||||
io_enq_0_decoded_immB,
|
||||
io_enq_0_decoded_immU,
|
||||
io_enq_0_decoded_immJ,
|
||||
input [4:0] io_enq_0_decoded_aluFn,
|
||||
input [2:0] io_enq_0_decoded_memWidth,
|
||||
input io_enq_0_decoded_isLoad,
|
||||
io_enq_0_decoded_isStore,
|
||||
io_enq_0_decoded_isBranch,
|
||||
io_enq_0_decoded_isJal,
|
||||
io_enq_0_decoded_isJalr,
|
||||
io_enq_0_decoded_isLui,
|
||||
io_enq_0_decoded_isAuipc,
|
||||
io_enq_0_decoded_isOpImm,
|
||||
io_enq_0_decoded_isWord,
|
||||
io_enq_0_decoded_isSystem,
|
||||
io_enq_0_decoded_writesRd,
|
||||
io_enq_0_decoded_illegal,
|
||||
input [5:0] io_enq_0_prs1,
|
||||
io_enq_0_prs2,
|
||||
input io_enq_0_src1Ready,
|
||||
io_enq_0_src2Ready,
|
||||
input [5:0] io_enq_0_prd,
|
||||
io_enq_0_robIdx,
|
||||
input [63:0] io_enq_1_decoded_pc,
|
||||
input [31:0] io_enq_1_decoded_inst,
|
||||
input [4:0] io_enq_1_decoded_rs1,
|
||||
io_enq_1_decoded_rs2,
|
||||
input [2:0] io_enq_1_decoded_funct3,
|
||||
input [63:0] io_enq_1_decoded_immI,
|
||||
io_enq_1_decoded_immS,
|
||||
io_enq_1_decoded_immB,
|
||||
io_enq_1_decoded_immU,
|
||||
io_enq_1_decoded_immJ,
|
||||
input [4:0] io_enq_1_decoded_aluFn,
|
||||
input [2:0] io_enq_1_decoded_memWidth,
|
||||
input io_enq_1_decoded_isLoad,
|
||||
io_enq_1_decoded_isStore,
|
||||
io_enq_1_decoded_isBranch,
|
||||
io_enq_1_decoded_isJal,
|
||||
io_enq_1_decoded_isJalr,
|
||||
io_enq_1_decoded_isLui,
|
||||
io_enq_1_decoded_isAuipc,
|
||||
io_enq_1_decoded_isOpImm,
|
||||
io_enq_1_decoded_isWord,
|
||||
io_enq_1_decoded_isSystem,
|
||||
io_enq_1_decoded_writesRd,
|
||||
io_enq_1_decoded_illegal,
|
||||
input [5:0] io_enq_1_prs1,
|
||||
io_enq_1_prs2,
|
||||
input io_enq_1_src1Ready,
|
||||
io_enq_1_src2Ready,
|
||||
input [5:0] io_enq_1_prd,
|
||||
io_enq_1_robIdx,
|
||||
output io_enqReady_0,
|
||||
io_enqReady_1,
|
||||
input io_wakeup_0_valid,
|
||||
input [5:0] io_wakeup_0_phys,
|
||||
input io_wakeup_1_valid,
|
||||
input [5:0] io_wakeup_1_phys,
|
||||
output io_issueValid_0,
|
||||
io_issueValid_1,
|
||||
output [63:0] io_issue_0_decoded_pc,
|
||||
output [31:0] io_issue_0_decoded_inst,
|
||||
output [4:0] io_issue_0_decoded_rs1,
|
||||
output [2:0] io_issue_0_decoded_funct3,
|
||||
output [63:0] io_issue_0_decoded_immI,
|
||||
io_issue_0_decoded_immS,
|
||||
io_issue_0_decoded_immB,
|
||||
io_issue_0_decoded_immU,
|
||||
io_issue_0_decoded_immJ,
|
||||
output [4:0] io_issue_0_decoded_aluFn,
|
||||
output [2:0] io_issue_0_decoded_memWidth,
|
||||
output io_issue_0_decoded_isLoad,
|
||||
io_issue_0_decoded_isStore,
|
||||
io_issue_0_decoded_isBranch,
|
||||
io_issue_0_decoded_isJal,
|
||||
io_issue_0_decoded_isJalr,
|
||||
io_issue_0_decoded_isLui,
|
||||
io_issue_0_decoded_isAuipc,
|
||||
io_issue_0_decoded_isOpImm,
|
||||
io_issue_0_decoded_isWord,
|
||||
io_issue_0_decoded_isSystem,
|
||||
io_issue_0_decoded_writesRd,
|
||||
io_issue_0_decoded_illegal,
|
||||
output [5:0] io_issue_0_prs1,
|
||||
io_issue_0_prs2,
|
||||
io_issue_0_prd,
|
||||
io_issue_0_robIdx,
|
||||
output [63:0] io_issue_1_decoded_pc,
|
||||
output [31:0] io_issue_1_decoded_inst,
|
||||
output [4:0] io_issue_1_decoded_rs1,
|
||||
output [2:0] io_issue_1_decoded_funct3,
|
||||
output [63:0] io_issue_1_decoded_immI,
|
||||
io_issue_1_decoded_immS,
|
||||
io_issue_1_decoded_immB,
|
||||
io_issue_1_decoded_immU,
|
||||
io_issue_1_decoded_immJ,
|
||||
output [4:0] io_issue_1_decoded_aluFn,
|
||||
output [2:0] io_issue_1_decoded_memWidth,
|
||||
output io_issue_1_decoded_isLoad,
|
||||
io_issue_1_decoded_isStore,
|
||||
io_issue_1_decoded_isBranch,
|
||||
io_issue_1_decoded_isJal,
|
||||
io_issue_1_decoded_isJalr,
|
||||
io_issue_1_decoded_isLui,
|
||||
io_issue_1_decoded_isAuipc,
|
||||
io_issue_1_decoded_isOpImm,
|
||||
io_issue_1_decoded_isWord,
|
||||
io_issue_1_decoded_isSystem,
|
||||
io_issue_1_decoded_writesRd,
|
||||
io_issue_1_decoded_illegal,
|
||||
output [5:0] io_issue_1_prs1,
|
||||
io_issue_1_prs2,
|
||||
io_issue_1_prd,
|
||||
io_issue_1_robIdx,
|
||||
input io_issueReady_0,
|
||||
io_issueReady_1,
|
||||
io_flush
|
||||
);
|
||||
|
||||
ReservationStation intRs (
|
||||
.clock (clock),
|
||||
.reset (reset),
|
||||
.io_enqValid_0 (io_enqValid_0),
|
||||
.io_enqValid_1 (io_enqValid_1),
|
||||
.io_enq_0_decoded_pc (io_enq_0_decoded_pc),
|
||||
.io_enq_0_decoded_inst (io_enq_0_decoded_inst),
|
||||
.io_enq_0_decoded_rs1 (io_enq_0_decoded_rs1),
|
||||
.io_enq_0_decoded_rs2 (io_enq_0_decoded_rs2),
|
||||
.io_enq_0_decoded_funct3 (io_enq_0_decoded_funct3),
|
||||
.io_enq_0_decoded_immI (io_enq_0_decoded_immI),
|
||||
.io_enq_0_decoded_immS (io_enq_0_decoded_immS),
|
||||
.io_enq_0_decoded_immB (io_enq_0_decoded_immB),
|
||||
.io_enq_0_decoded_immU (io_enq_0_decoded_immU),
|
||||
.io_enq_0_decoded_immJ (io_enq_0_decoded_immJ),
|
||||
.io_enq_0_decoded_aluFn (io_enq_0_decoded_aluFn),
|
||||
.io_enq_0_decoded_memWidth (io_enq_0_decoded_memWidth),
|
||||
.io_enq_0_decoded_isLoad (io_enq_0_decoded_isLoad),
|
||||
.io_enq_0_decoded_isStore (io_enq_0_decoded_isStore),
|
||||
.io_enq_0_decoded_isBranch (io_enq_0_decoded_isBranch),
|
||||
.io_enq_0_decoded_isJal (io_enq_0_decoded_isJal),
|
||||
.io_enq_0_decoded_isJalr (io_enq_0_decoded_isJalr),
|
||||
.io_enq_0_decoded_isLui (io_enq_0_decoded_isLui),
|
||||
.io_enq_0_decoded_isAuipc (io_enq_0_decoded_isAuipc),
|
||||
.io_enq_0_decoded_isOpImm (io_enq_0_decoded_isOpImm),
|
||||
.io_enq_0_decoded_isWord (io_enq_0_decoded_isWord),
|
||||
.io_enq_0_decoded_isSystem (io_enq_0_decoded_isSystem),
|
||||
.io_enq_0_decoded_writesRd (io_enq_0_decoded_writesRd),
|
||||
.io_enq_0_decoded_illegal (io_enq_0_decoded_illegal),
|
||||
.io_enq_0_prs1 (io_enq_0_prs1),
|
||||
.io_enq_0_prs2 (io_enq_0_prs2),
|
||||
.io_enq_0_src1Ready (io_enq_0_src1Ready),
|
||||
.io_enq_0_src2Ready (io_enq_0_src2Ready),
|
||||
.io_enq_0_prd (io_enq_0_prd),
|
||||
.io_enq_0_robIdx (io_enq_0_robIdx),
|
||||
.io_enq_1_decoded_pc (io_enq_1_decoded_pc),
|
||||
.io_enq_1_decoded_inst (io_enq_1_decoded_inst),
|
||||
.io_enq_1_decoded_rs1 (io_enq_1_decoded_rs1),
|
||||
.io_enq_1_decoded_rs2 (io_enq_1_decoded_rs2),
|
||||
.io_enq_1_decoded_funct3 (io_enq_1_decoded_funct3),
|
||||
.io_enq_1_decoded_immI (io_enq_1_decoded_immI),
|
||||
.io_enq_1_decoded_immS (io_enq_1_decoded_immS),
|
||||
.io_enq_1_decoded_immB (io_enq_1_decoded_immB),
|
||||
.io_enq_1_decoded_immU (io_enq_1_decoded_immU),
|
||||
.io_enq_1_decoded_immJ (io_enq_1_decoded_immJ),
|
||||
.io_enq_1_decoded_aluFn (io_enq_1_decoded_aluFn),
|
||||
.io_enq_1_decoded_memWidth (io_enq_1_decoded_memWidth),
|
||||
.io_enq_1_decoded_isLoad (io_enq_1_decoded_isLoad),
|
||||
.io_enq_1_decoded_isStore (io_enq_1_decoded_isStore),
|
||||
.io_enq_1_decoded_isBranch (io_enq_1_decoded_isBranch),
|
||||
.io_enq_1_decoded_isJal (io_enq_1_decoded_isJal),
|
||||
.io_enq_1_decoded_isJalr (io_enq_1_decoded_isJalr),
|
||||
.io_enq_1_decoded_isLui (io_enq_1_decoded_isLui),
|
||||
.io_enq_1_decoded_isAuipc (io_enq_1_decoded_isAuipc),
|
||||
.io_enq_1_decoded_isOpImm (io_enq_1_decoded_isOpImm),
|
||||
.io_enq_1_decoded_isWord (io_enq_1_decoded_isWord),
|
||||
.io_enq_1_decoded_isSystem (io_enq_1_decoded_isSystem),
|
||||
.io_enq_1_decoded_writesRd (io_enq_1_decoded_writesRd),
|
||||
.io_enq_1_decoded_illegal (io_enq_1_decoded_illegal),
|
||||
.io_enq_1_prs1 (io_enq_1_prs1),
|
||||
.io_enq_1_prs2 (io_enq_1_prs2),
|
||||
.io_enq_1_src1Ready (io_enq_1_src1Ready),
|
||||
.io_enq_1_src2Ready (io_enq_1_src2Ready),
|
||||
.io_enq_1_prd (io_enq_1_prd),
|
||||
.io_enq_1_robIdx (io_enq_1_robIdx),
|
||||
.io_enqReady_0 (io_enqReady_0),
|
||||
.io_enqReady_1 (io_enqReady_1),
|
||||
.io_wakeup_0_valid (io_wakeup_0_valid),
|
||||
.io_wakeup_0_phys (io_wakeup_0_phys),
|
||||
.io_wakeup_1_valid (io_wakeup_1_valid),
|
||||
.io_wakeup_1_phys (io_wakeup_1_phys),
|
||||
.io_issueValid_0 (io_issueValid_0),
|
||||
.io_issueValid_1 (io_issueValid_1),
|
||||
.io_issue_0_decoded_pc (io_issue_0_decoded_pc),
|
||||
.io_issue_0_decoded_inst (io_issue_0_decoded_inst),
|
||||
.io_issue_0_decoded_rs1 (io_issue_0_decoded_rs1),
|
||||
.io_issue_0_decoded_funct3 (io_issue_0_decoded_funct3),
|
||||
.io_issue_0_decoded_immI (io_issue_0_decoded_immI),
|
||||
.io_issue_0_decoded_immS (io_issue_0_decoded_immS),
|
||||
.io_issue_0_decoded_immB (io_issue_0_decoded_immB),
|
||||
.io_issue_0_decoded_immU (io_issue_0_decoded_immU),
|
||||
.io_issue_0_decoded_immJ (io_issue_0_decoded_immJ),
|
||||
.io_issue_0_decoded_aluFn (io_issue_0_decoded_aluFn),
|
||||
.io_issue_0_decoded_memWidth (io_issue_0_decoded_memWidth),
|
||||
.io_issue_0_decoded_isLoad (io_issue_0_decoded_isLoad),
|
||||
.io_issue_0_decoded_isStore (io_issue_0_decoded_isStore),
|
||||
.io_issue_0_decoded_isBranch (io_issue_0_decoded_isBranch),
|
||||
.io_issue_0_decoded_isJal (io_issue_0_decoded_isJal),
|
||||
.io_issue_0_decoded_isJalr (io_issue_0_decoded_isJalr),
|
||||
.io_issue_0_decoded_isLui (io_issue_0_decoded_isLui),
|
||||
.io_issue_0_decoded_isAuipc (io_issue_0_decoded_isAuipc),
|
||||
.io_issue_0_decoded_isOpImm (io_issue_0_decoded_isOpImm),
|
||||
.io_issue_0_decoded_isWord (io_issue_0_decoded_isWord),
|
||||
.io_issue_0_decoded_isSystem (io_issue_0_decoded_isSystem),
|
||||
.io_issue_0_decoded_writesRd (io_issue_0_decoded_writesRd),
|
||||
.io_issue_0_decoded_illegal (io_issue_0_decoded_illegal),
|
||||
.io_issue_0_prs1 (io_issue_0_prs1),
|
||||
.io_issue_0_prs2 (io_issue_0_prs2),
|
||||
.io_issue_0_prd (io_issue_0_prd),
|
||||
.io_issue_0_robIdx (io_issue_0_robIdx),
|
||||
.io_issue_1_decoded_pc (io_issue_1_decoded_pc),
|
||||
.io_issue_1_decoded_inst (io_issue_1_decoded_inst),
|
||||
.io_issue_1_decoded_rs1 (io_issue_1_decoded_rs1),
|
||||
.io_issue_1_decoded_funct3 (io_issue_1_decoded_funct3),
|
||||
.io_issue_1_decoded_immI (io_issue_1_decoded_immI),
|
||||
.io_issue_1_decoded_immS (io_issue_1_decoded_immS),
|
||||
.io_issue_1_decoded_immB (io_issue_1_decoded_immB),
|
||||
.io_issue_1_decoded_immU (io_issue_1_decoded_immU),
|
||||
.io_issue_1_decoded_immJ (io_issue_1_decoded_immJ),
|
||||
.io_issue_1_decoded_aluFn (io_issue_1_decoded_aluFn),
|
||||
.io_issue_1_decoded_memWidth (io_issue_1_decoded_memWidth),
|
||||
.io_issue_1_decoded_isLoad (io_issue_1_decoded_isLoad),
|
||||
.io_issue_1_decoded_isStore (io_issue_1_decoded_isStore),
|
||||
.io_issue_1_decoded_isBranch (io_issue_1_decoded_isBranch),
|
||||
.io_issue_1_decoded_isJal (io_issue_1_decoded_isJal),
|
||||
.io_issue_1_decoded_isJalr (io_issue_1_decoded_isJalr),
|
||||
.io_issue_1_decoded_isLui (io_issue_1_decoded_isLui),
|
||||
.io_issue_1_decoded_isAuipc (io_issue_1_decoded_isAuipc),
|
||||
.io_issue_1_decoded_isOpImm (io_issue_1_decoded_isOpImm),
|
||||
.io_issue_1_decoded_isWord (io_issue_1_decoded_isWord),
|
||||
.io_issue_1_decoded_isSystem (io_issue_1_decoded_isSystem),
|
||||
.io_issue_1_decoded_writesRd (io_issue_1_decoded_writesRd),
|
||||
.io_issue_1_decoded_illegal (io_issue_1_decoded_illegal),
|
||||
.io_issue_1_prs1 (io_issue_1_prs1),
|
||||
.io_issue_1_prs2 (io_issue_1_prs2),
|
||||
.io_issue_1_prd (io_issue_1_prd),
|
||||
.io_issue_1_robIdx (io_issue_1_robIdx),
|
||||
.io_issueReady_0 (io_issueReady_0),
|
||||
.io_issueReady_1 (io_issueReady_1),
|
||||
.io_flush (io_flush)
|
||||
);
|
||||
endmodule
|
||||
|
||||
Reference in New Issue
Block a user