270 lines
13 KiB
C++
270 lines
13 KiB
C++
#include "RISCv64AsmPrinter.h"
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#include "RISCv64ISel.h"
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#include <stdexcept>
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namespace sysy {
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// 检查是否为内存加载/存储指令，以处理特殊的打印格式
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bool isMemoryOp(RVOpcodes opcode) {
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switch (opcode) {
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case RVOpcodes::LB: case RVOpcodes::LH: case RVOpcodes::LW: case RVOpcodes::LD:
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case RVOpcodes::LBU: case RVOpcodes::LHU: case RVOpcodes::LWU:
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case RVOpcodes::SB: case RVOpcodes::SH: case RVOpcodes::SW: case RVOpcodes::SD:
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return true;
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default:
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return false;
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}
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}
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RISCv64AsmPrinter::RISCv64AsmPrinter(MachineFunction* mfunc) : MFunc(mfunc) {}
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void RISCv64AsmPrinter::run(std::ostream& os, bool debug) {
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OS = &os;
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*OS << ".globl " << MFunc->getName() << "\n";
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*OS << MFunc->getName() << ":\n";
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printPrologue();
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for (auto& mbb : MFunc->getBlocks()) {
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printBasicBlock(mbb.get(), debug);
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}
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}
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// 在 RISCv64AsmPrinter.cpp 文件中
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void RISCv64AsmPrinter::printPrologue() {
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StackFrameInfo& frame_info = MFunc->getFrameInfo();
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// 序言需要为保存ra和s0预留16字节
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int total_stack_size = frame_info.locals_size + frame_info.spill_size + 16;
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int aligned_stack_size = (total_stack_size + 15) & ~15;
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frame_info.total_size = aligned_stack_size;
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if (aligned_stack_size > 0) {
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*OS << " addi sp, sp, -" << aligned_stack_size << "\n";
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*OS << " sd ra, " << (aligned_stack_size - 8) << "(sp)\n";
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*OS << " sd s0, " << (aligned_stack_size - 16) << "(sp)\n";
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*OS << " addi s0, sp, " << aligned_stack_size << "\n";
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}
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// // 为函数参数分配寄存器
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// Function* F = MFunc->getFunc();
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// if (F && F->getEntryBlock()) {
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// int arg_idx = 0;
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// RISCv64ISel* isel = MFunc->getISel();
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// // 获取函数所有参数的类型列表
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// auto param_types = F->getParamTypes();
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// for (AllocaInst* alloca_for_param : F->getEntryBlock()->getArguments()) {
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// if (arg_idx >= 8) break;
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// unsigned vreg = isel->getVReg(alloca_for_param);
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// if (frame_info.alloca_offsets.count(vreg)) {
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// int offset = frame_info.alloca_offsets.at(vreg);
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// auto arg_reg = static_cast<PhysicalReg>(static_cast<int>(PhysicalReg::A0) + arg_idx);
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// // 1. 获取当前参数的真实类型
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// // 注意：F->getParamTypes() 返回的是一个 range-based view，需要转换为vector或直接使用
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// Type* current_param_type = nullptr;
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// int temp_idx = 0;
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// for(auto p_type : param_types) {
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// if (temp_idx == arg_idx) {
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// current_param_type = p_type;
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// break;
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// }
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// temp_idx++;
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// }
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// assert(current_param_type && "Could not find parameter type.");
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// // 2. 根据类型决定使用 "sw" 还是 "sd"
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// const char* store_op = current_param_type->isPointer() ? "sd" : "sw";
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// // 3. 打印正确的存储指令
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// *OS << " " << store_op << " " << regToString(arg_reg) << ", " << offset << "(s0)\n";
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// }
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// arg_idx++;
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// }
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// }
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}
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void RISCv64AsmPrinter::printEpilogue() {
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int aligned_stack_size = MFunc->getFrameInfo().total_size;
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if (aligned_stack_size > 0) {
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*OS << " ld ra, " << (aligned_stack_size - 8) << "(sp)\n";
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*OS << " ld s0, " << (aligned_stack_size - 16) << "(sp)\n";
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*OS << " addi sp, sp, " << aligned_stack_size << "\n";
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}
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}
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void RISCv64AsmPrinter::printBasicBlock(MachineBasicBlock* mbb, bool debug) {
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if (!mbb->getName().empty()) {
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*OS << mbb->getName() << ":\n";
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}
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for (auto& instr : mbb->getInstructions()) {
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printInstruction(instr.get(), debug);
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}
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}
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void RISCv64AsmPrinter::printInstruction(MachineInstr* instr, bool debug) {
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auto opcode = instr->getOpcode();
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if (opcode == RVOpcodes::RET) {
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printEpilogue();
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}
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if (opcode == RVOpcodes::LABEL) {
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// 标签直接打印，不加缩进
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printOperand(instr->getOperands()[0].get());
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*OS << ":\n";
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return; // 处理完毕，直接返回
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}
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// 对于所有非标签指令，先打印缩进
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*OS << " ";
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switch (opcode) {
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case RVOpcodes::ADD: *OS << "add "; break; case RVOpcodes::ADDI: *OS << "addi "; break;
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case RVOpcodes::ADDW: *OS << "addw "; break; case RVOpcodes::ADDIW: *OS << "addiw "; break;
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case RVOpcodes::SUB: *OS << "sub "; break; case RVOpcodes::SUBW: *OS << "subw "; break;
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case RVOpcodes::MUL: *OS << "mul "; break; case RVOpcodes::MULW: *OS << "mulw "; break;
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case RVOpcodes::DIV: *OS << "div "; break; case RVOpcodes::DIVW: *OS << "divw "; break;
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case RVOpcodes::REM: *OS << "rem "; break; case RVOpcodes::REMW: *OS << "remw "; break;
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case RVOpcodes::XOR: *OS << "xor "; break; case RVOpcodes::XORI: *OS << "xori "; break;
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case RVOpcodes::OR: *OS << "or "; break; case RVOpcodes::ORI: *OS << "ori "; break;
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case RVOpcodes::AND: *OS << "and "; break; case RVOpcodes::ANDI: *OS << "andi "; break;
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case RVOpcodes::SLL: *OS << "sll "; break; case RVOpcodes::SLLI: *OS << "slli "; break;
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case RVOpcodes::SLLW: *OS << "sllw "; break; case RVOpcodes::SLLIW: *OS << "slliw "; break;
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case RVOpcodes::SRL: *OS << "srl "; break; case RVOpcodes::SRLI: *OS << "srli "; break;
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case RVOpcodes::SRLW: *OS << "srlw "; break; case RVOpcodes::SRLIW: *OS << "srliw "; break;
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case RVOpcodes::SRA: *OS << "sra "; break; case RVOpcodes::SRAI: *OS << "srai "; break;
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case RVOpcodes::SRAW: *OS << "sraw "; break; case RVOpcodes::SRAIW: *OS << "sraiw "; break;
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case RVOpcodes::SLT: *OS << "slt "; break; case RVOpcodes::SLTI: *OS << "slti "; break;
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case RVOpcodes::SLTU: *OS << "sltu "; break; case RVOpcodes::SLTIU: *OS << "sltiu "; break;
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case RVOpcodes::LW: *OS << "lw "; break; case RVOpcodes::LH: *OS << "lh "; break;
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case RVOpcodes::LB: *OS << "lb "; break; case RVOpcodes::LWU: *OS << "lwu "; break;
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case RVOpcodes::LHU: *OS << "lhu "; break; case RVOpcodes::LBU: *OS << "lbu "; break;
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case RVOpcodes::SW: *OS << "sw "; break; case RVOpcodes::SH: *OS << "sh "; break;
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case RVOpcodes::SB: *OS << "sb "; break; case RVOpcodes::LD: *OS << "ld "; break;
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case RVOpcodes::SD: *OS << "sd "; break;
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case RVOpcodes::J: *OS << "j "; break; case RVOpcodes::JAL: *OS << "jal "; break;
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case RVOpcodes::JALR: *OS << "jalr "; break; case RVOpcodes::RET: *OS << "ret"; break;
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case RVOpcodes::BEQ: *OS << "beq "; break; case RVOpcodes::BNE: *OS << "bne "; break;
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case RVOpcodes::BLT: *OS << "blt "; break; case RVOpcodes::BGE: *OS << "bge "; break;
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case RVOpcodes::BLTU: *OS << "bltu "; break; case RVOpcodes::BGEU: *OS << "bgeu "; break;
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case RVOpcodes::LI: *OS << "li "; break; case RVOpcodes::LA: *OS << "la "; break;
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case RVOpcodes::MV: *OS << "mv "; break; case RVOpcodes::NEG: *OS << "neg "; break;
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case RVOpcodes::NEGW: *OS << "negw "; break; case RVOpcodes::SEQZ: *OS << "seqz "; break;
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case RVOpcodes::SNEZ: *OS << "snez "; break;
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case RVOpcodes::CALL: *OS << "call "; break;
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case RVOpcodes::LABEL:
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break;
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case RVOpcodes::FRAME_LOAD_W:
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// It should have been eliminated by RegAlloc
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if (!debug) throw std::runtime_error("FRAME pseudo-instruction not eliminated before AsmPrinter");
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*OS << "frame_load_w "; break;
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case RVOpcodes::FRAME_LOAD_D:
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// It should have been eliminated by RegAlloc
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if (!debug) throw std::runtime_error("FRAME pseudo-instruction not eliminated before AsmPrinter");
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*OS << "frame_load_d "; break;
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case RVOpcodes::FRAME_STORE_W:
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// It should have been eliminated by RegAlloc
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if (!debug) throw std::runtime_error("FRAME pseudo-instruction not eliminated before AsmPrinter");
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*OS << "frame_store_w "; break;
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case RVOpcodes::FRAME_STORE_D:
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// It should have been eliminated by RegAlloc
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if (!debug) throw std::runtime_error("FRAME pseudo-instruction not eliminated before AsmPrinter");
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*OS << "frame_store_d "; break;
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case RVOpcodes::FRAME_ADDR:
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// It should have been eliminated by RegAlloc
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if (!debug) throw std::runtime_error("FRAME pseudo-instruction not eliminated before AsmPrinter");
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*OS << "frame_addr "; break;
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default:
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throw std::runtime_error("Unknown opcode in AsmPrinter");
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}
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const auto& operands = instr->getOperands();
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if (!operands.empty()) {
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if (isMemoryOp(opcode)) {
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printOperand(operands[0].get());
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*OS << ", ";
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printOperand(operands[1].get());
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} else {
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for (size_t i = 0; i < operands.size(); ++i) {
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printOperand(operands[i].get());
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if (i < operands.size() - 1) {
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*OS << ", ";
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}
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}
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}
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}
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*OS << "\n";
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}
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void RISCv64AsmPrinter::printOperand(MachineOperand* op) {
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if (!op) return;
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switch(op->getKind()) {
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case MachineOperand::KIND_REG: {
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auto reg_op = static_cast<RegOperand*>(op);
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if (reg_op->isVirtual()) {
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*OS << "%vreg" << reg_op->getVRegNum();
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} else {
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*OS << regToString(reg_op->getPReg());
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}
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break;
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}
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case MachineOperand::KIND_IMM:
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*OS << static_cast<ImmOperand*>(op)->getValue();
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break;
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case MachineOperand::KIND_LABEL:
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*OS << static_cast<LabelOperand*>(op)->getName();
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break;
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case MachineOperand::KIND_MEM: {
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auto mem_op = static_cast<MemOperand*>(op);
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printOperand(mem_op->getOffset());
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*OS << "(";
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printOperand(mem_op->getBase());
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*OS << ")";
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break;
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}
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}
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}
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std::string RISCv64AsmPrinter::regToString(PhysicalReg reg) {
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switch (reg) {
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case PhysicalReg::ZERO: return "x0"; case PhysicalReg::RA: return "ra";
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case PhysicalReg::SP: return "sp"; case PhysicalReg::GP: return "gp";
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case PhysicalReg::TP: return "tp"; case PhysicalReg::T0: return "t0";
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case PhysicalReg::T1: return "t1"; case PhysicalReg::T2: return "t2";
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case PhysicalReg::S0: return "s0"; case PhysicalReg::S1: return "s1";
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case PhysicalReg::A0: return "a0"; case PhysicalReg::A1: return "a1";
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case PhysicalReg::A2: return "a2"; case PhysicalReg::A3: return "a3";
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case PhysicalReg::A4: return "a4"; case PhysicalReg::A5: return "a5";
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case PhysicalReg::A6: return "a6"; case PhysicalReg::A7: return "a7";
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case PhysicalReg::S2: return "s2"; case PhysicalReg::S3: return "s3";
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case PhysicalReg::S4: return "s4"; case PhysicalReg::S5: return "s5";
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case PhysicalReg::S6: return "s6"; case PhysicalReg::S7: return "s7";
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case PhysicalReg::S8: return "s8"; case PhysicalReg::S9: return "s9";
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case PhysicalReg::S10: return "s10"; case PhysicalReg::S11: return "s11";
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case PhysicalReg::T3: return "t3"; case PhysicalReg::T4: return "t4";
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case PhysicalReg::T5: return "t5"; case PhysicalReg::T6: return "t6";
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case PhysicalReg::F0: return "f0"; case PhysicalReg::F1: return "f1";
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case PhysicalReg::F2: return "f2"; case PhysicalReg::F3: return "f3";
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case PhysicalReg::F4: return "f4"; case PhysicalReg::F5: return "f5";
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case PhysicalReg::F6: return "f6"; case PhysicalReg::F7: return "f7";
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case PhysicalReg::F8: return "f8"; case PhysicalReg::F9: return "f9";
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case PhysicalReg::F10: return "f10"; case PhysicalReg::F11: return "f11";
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case PhysicalReg::F12: return "f12"; case PhysicalReg::F13: return "f13";
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case PhysicalReg::F14: return "f14"; case PhysicalReg::F15: return "f15";
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case PhysicalReg::F16: return "f16"; case PhysicalReg::F17: return "f17";
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case PhysicalReg::F18: return "f18"; case PhysicalReg::F19: return "f19";
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case PhysicalReg::F20: return "f20"; case PhysicalReg::F21: return "f21";
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case PhysicalReg::F22: return "f22"; case PhysicalReg::F23: return "f23";
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case PhysicalReg::F24: return "f24"; case PhysicalReg::F25: return "f25";
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case PhysicalReg::F26: return "f26"; case PhysicalReg::F27: return "f27";
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case PhysicalReg::F28: return "f28"; case PhysicalReg::F29: return "f29";
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case PhysicalReg::F30: return "f30"; case PhysicalReg::F31: return "f31";
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default: return "UNKNOWN_REG";
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}
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}
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} // namespace sysy
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