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9c5d9ea78c836133bd8a0e0266a3c18abe1bdc5c
mysysy
/
src
/
include
/
backend
/
RISCv64
History
CGH0S7
0ce742a86e
[optimize]添加更为通用的除法强度削减Pass, 不受除数限制替换div指令,不影响当前分数
2025-08-03 14:37:33 +08:00
..
Handler
[midend]重构了src目录
2025-07-29 21:30:30 +08:00
Optimize
[optimze]添加基础的除法指令优化,目前只对除以2的幂数生效
2025-08-03 13:46:42 +08:00
RISCv64AsmPrinter.h
[backend]引入浮点数支持,但目前寄存器分配存在问题
2025-07-30 15:07:29 +08:00
RISCv64Backend.h
[midend]重构了src目录
2025-07-29 21:30:30 +08:00
RISCv64ISel.h
[backend-float]修复部分问题
2025-07-30 16:00:02 +08:00
RISCv64LLIR.h
[optimize]添加更为通用的除法强度削减Pass, 不受除数限制替换div指令,不影响当前分数
2025-08-03 14:37:33 +08:00
RISCv64Passes.h
[optimze]添加基础的除法指令优化,目前只对除以2的幂数生效
2025-08-03 13:46:42 +08:00
RISCv64RegAlloc.h
[backend]引入浮点数支持,但目前寄存器分配存在问题
2025-07-30 15:07:29 +08:00