Lixuanwang 17f1bed310 Merge branch 'backend-lag' into backend

2025-08-04 16:43:43 +08:00

..

Handler

Merge branch 'backend-lag' into backend

2025-08-04 16:43:43 +08:00

Optimize

[optimize]添加更为通用的除法强度削减Pass, 不受除数限制替换div指令，不影响当前分数

2025-08-03 14:37:33 +08:00

CMakeLists.txt

合并backend、backend-IRC到midend

2025-08-03 15:18:52 +08:00

RISCv64AsmPrinter.cpp

[backend]添加了一些工具函数

2025-08-04 16:32:54 +08:00

RISCv64Backend.cpp

[backend]修复了较小全零全局数组未显示初始化导致未定义行为的问题

2025-08-04 02:31:18 +08:00

RISCv64ISel.cpp

Merge branch 'backend-lag' into backend

2025-08-04 16:43:43 +08:00

RISCv64LLIR.cpp

合并backend、backend-IRC到midend

2025-08-03 15:18:52 +08:00

RISCv64RegAlloc.cpp

Merge branch 'backend' of gitee.com:lixuanwang/mysysy into backend

2025-08-04 16:34:22 +08:00