Lixuanwang 167c2ac2ae [backend]完善了后端流水线

2025-08-05 16:10:04 +08:00

..

Handler

Merge branch 'backend-lag' into backend

2025-08-04 16:43:43 +08:00

Optimize

[optimize]添加更为通用的除法强度削减Pass, 不受除数限制替换div指令，不影响当前分数

2025-08-03 14:37:33 +08:00

CMakeLists.txt

[backend]继续增强寄存器分配器健壮性

2025-08-05 13:50:55 +08:00

RISCv64AsmPrinter.cpp

[backend]继续增强寄存器分配器健壮性

2025-08-05 13:50:55 +08:00

RISCv64Backend.cpp

[backend]完善了后端流水线

2025-08-05 16:10:04 +08:00

RISCv64BasicBlockAlloc.cpp

[backend]继续增强寄存器分配器健壮性

2025-08-05 13:50:55 +08:00

RISCv64ISel.cpp

[backend]修复浮点数截断逻辑 h36通过

2025-08-05 02:44:23 +08:00

RISCv64LinearScan.cpp

[backend]完善了后端流水线

2025-08-05 16:10:04 +08:00

RISCv64LLIR.cpp

[backend]继续增强寄存器分配器健壮性

2025-08-05 13:50:55 +08:00

RISCv64RegAlloc.cpp

[backend]完善了后端流水线

2025-08-05 16:10:04 +08:00