Merge commit '07fd22def182a12999de6ae0c9447056fb9d7a40' into backend

src/include/backend/RISCv64/Optimize/Peephole.h

@@ -23,6 +23,21 @@ public:
     bool runOnFunction(Function *F, AnalysisManager& AM) override;
     
     void runOnMachineFunction(MachineFunction* mfunc);
+    
+    /**
+     * @brief 设置是否启用浮点乘加融合优化
+     * @param enabled 是否启用
+     */
+    static void setFusedMulAddEnabled(bool enabled) { fusedMulAddEnabled = enabled; }
+    
+    /**
+     * @brief 检查是否启用了浮点乘加融合优化
+     * @return 是否启用
+     */
+    static bool isFusedMulAddEnabled() { return fusedMulAddEnabled; }
+
+private:
+    static bool fusedMulAddEnabled;  // 浮点乘加融合优化开关
 };
 
 } // namespace sysy

src/include/backend/RISCv64/RISCv64Info.h

@@ -85,6 +85,7 @@ static const std::map<RVOpcodes, std::pair<std::vector<int>, std::vector<int>>>
     // --- 浮点指令 ---
     {RVOpcodes::FADD_S, {{0}, {1, 2}}}, {RVOpcodes::FSUB_S, {{0}, {1, 2}}},
     {RVOpcodes::FMUL_S, {{0}, {1, 2}}}, {RVOpcodes::FDIV_S, {{0}, {1, 2}}},
+    {RVOpcodes::FMADD_S, {{0}, {1, 2, 3}}},
     {RVOpcodes::FEQ_S, {{0}, {1, 2}}}, {RVOpcodes::FLT_S, {{0}, {1, 2}}}, {RVOpcodes::FLE_S, {{0}, {1, 2}}},
     {RVOpcodes::FCVT_S_W, {{0}, {1}}}, {RVOpcodes::FCVT_W_S, {{0}, {1}}},
     {RVOpcodes::FCVT_W_S_RTZ, {{0}, {1}}},

src/include/backend/RISCv64/RISCv64LLIR.h

@@ -79,6 +79,7 @@ enum class RVOpcodes {
     FSUB_S, // fsub.s rd, rs1, rs2
     FMUL_S, // fmul.s rd, rs1, rs2
     FDIV_S, // fdiv.s rd, rs1, rs2
+    FMADD_S, // fmadd.s rd, rs1, rs2, rs3
     
     // 浮点比较 (单精度)
     FEQ_S,  // feq.s rd, rs1, rs2 (结果写入整数寄存器rd)