[backend-llir]修复了许多重构的bug
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@@ -1,66 +1,51 @@
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#ifndef RISCV64_LLIR_H
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#define RISCV64_LLIR_H
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#include "IR.h" // 确保包含了您自己的IR头文件
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#include <string>
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#include <vector>
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#include <memory>
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#include <cstdint>
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#include <map>
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// 前向声明,避免循环引用
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namespace sysy {
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class Function;
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class RISCv64ISel;
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}
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namespace sysy {
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// 物理寄存器定义 (从 RISCv64Backend.h 移至此)
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// 物理寄存器定义
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enum class PhysicalReg {
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ZERO, RA, SP, GP, TP, T0, T1, T2, S0, S1, A0, A1, A2, A3, A4, A5, A6, A7, S2, S3, S4, S5, S6, S7, S8, S9, S10, S11, T3, T4, T5, T6,
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F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13, F14, F15,F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29, F30, F31
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};
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// RISC-V 指令操作码枚举
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enum class RVOpcodes {
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// 算术指令
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ADD, ADDI, ADDW, ADDIW,
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SUB, SUBW,
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MUL, MULW,
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DIV, DIVW,
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REM, REMW,
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ADD, ADDI, ADDW, ADDIW, SUB, SUBW, MUL, MULW, DIV, DIVW, REM, REMW,
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// 逻辑指令
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XOR, XORI,
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OR, ORI,
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AND, ANDI,
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XOR, XORI, OR, ORI, AND, ANDI,
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// 移位指令
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SLL, SLLI, SLLW, SLLIW,
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SRL, SRLI, SRLW, SRLIW,
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SRA, SRAI, SRAW, SRAIW,
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SLL, SLLI, SLLW, SLLIW, SRL, SRLI, SRLW, SRLIW, SRA, SRAI, SRAW, SRAIW,
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// 比较指令
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SLT, SLTI, SLTU, SLTIU,
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// 内存访问指令
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LW, LH, LB, LWU, LHU, LBU,
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SW, SH, SB,
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LD, SD, // 64位
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LW, LH, LB, LWU, LHU, LBU, SW, SH, SB, LD, SD,
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// 控制流指令
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J, JAL, JALR, RET, // RET 是 JALR x0, 0(ra) 的伪指令
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J, JAL, JALR, RET,
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BEQ, BNE, BLT, BGE, BLTU, BGEU,
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// 伪指令 (方便指令选择)
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LI, // Load Immediate
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LA, // Load Address
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MV, // Move register
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NEG, // Negate
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NEGW, // Negate Word
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SEQZ, // Set if Equal to Zero
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SNEZ, // Set if Not Equal to Zero
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// 伪指令
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LI, LA, MV, NEG, NEGW, SEQZ, SNEZ,
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// 函数调用
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CALL,
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// 特殊标记,非指令
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LABEL, // 用于表示一个标签位置
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LABEL,
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// 新增伪指令,用于解耦栈帧处理
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FRAME_LOAD, // 从栈帧加载 (AllocaInst)
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FRAME_STORE, // 保存到栈帧 (AllocaInst)
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};
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class MachineOperand;
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@@ -72,22 +57,13 @@ class MachineInstr;
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class MachineBasicBlock;
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class MachineFunction;
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// --- 操作数定义 ---
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// 操作数基类
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class MachineOperand {
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public:
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enum OperandKind {
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KIND_REG,
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KIND_IMM,
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KIND_LABEL,
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KIND_MEM
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};
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enum OperandKind { KIND_REG, KIND_IMM, KIND_LABEL, KIND_MEM };
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MachineOperand(OperandKind kind) : kind(kind) {}
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virtual ~MachineOperand() = default;
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OperandKind getKind() const { return kind; }
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private:
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OperandKind kind;
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};
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@@ -111,7 +87,6 @@ public:
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preg = new_preg;
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is_virtual = false;
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}
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private:
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unsigned vreg_num = 0;
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PhysicalReg preg = PhysicalReg::ZERO;
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@@ -121,9 +96,7 @@ private:
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// 立即数操作数
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class ImmOperand : public MachineOperand {
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public:
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ImmOperand(int64_t value)
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: MachineOperand(KIND_IMM), value(value) {}
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ImmOperand(int64_t value) : MachineOperand(KIND_IMM), value(value) {}
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int64_t getValue() const { return value; }
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private:
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int64_t value;
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@@ -132,9 +105,7 @@ private:
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// 标签操作数
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class LabelOperand : public MachineOperand {
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public:
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LabelOperand(const std::string& name)
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: MachineOperand(KIND_LABEL), name(name) {}
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LabelOperand(const std::string& name) : MachineOperand(KIND_LABEL), name(name) {}
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const std::string& getName() const { return name; }
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private:
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std::string name;
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@@ -145,33 +116,25 @@ class MemOperand : public MachineOperand {
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public:
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MemOperand(std::unique_ptr<RegOperand> base, std::unique_ptr<ImmOperand> offset)
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: MachineOperand(KIND_MEM), base(std::move(base)), offset(std::move(offset)) {}
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RegOperand* getBase() const { return base.get(); }
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ImmOperand* getOffset() const { return offset.get(); }
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private:
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std::unique_ptr<RegOperand> base;
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std::unique_ptr<ImmOperand> offset;
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};
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// --- 组织结构定义 ---
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// 机器指令
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class MachineInstr {
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public:
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MachineInstr(RVOpcodes opcode) : opcode(opcode) {}
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RVOpcodes getOpcode() const { return opcode; }
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// 注意:返回const引用,因为通常不直接修改指令的操作数列表
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const std::vector<std::unique_ptr<MachineOperand>>& getOperands() const { return operands; }
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// 提供一个非const版本,用于内部修改
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std::vector<std::unique_ptr<MachineOperand>>& getOperands() { return operands; }
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void addOperand(std::unique_ptr<MachineOperand> operand) {
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operands.push_back(std::move(operand));
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}
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private:
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RVOpcodes opcode;
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std::vector<std::unique_ptr<MachineOperand>> operands;
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@@ -185,8 +148,6 @@ public:
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const std::string& getName() const { return name; }
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MachineFunction* getParent() const { return parent; }
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// 同时提供 const 和 non-const 版本
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const std::vector<std::unique_ptr<MachineInstr>>& getInstructions() const { return instructions; }
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std::vector<std::unique_ptr<MachineInstr>>& getInstructions() { return instructions; }
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@@ -196,43 +157,44 @@ public:
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std::vector<MachineBasicBlock*> successors;
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std::vector<MachineBasicBlock*> predecessors;
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private:
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std::string name;
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std::vector<std::unique_ptr<MachineInstr>> instructions;
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MachineFunction* parent; // 指向所属函数
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MachineFunction* parent;
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};
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// 栈帧信息
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struct StackFrameInfo {
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int frame_size = 0;
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std::map<int, int> spill_slots; // <虚拟寄存器号, 栈偏移>
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// ... 未来可以添加更多信息
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int locals_size = 0; // 仅为AllocaInst分配的大小
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int spill_size = 0; // 仅为溢出分配的大小
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int total_size = 0; // 总大小
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std::map<unsigned, int> alloca_offsets; // <AllocaInst的vreg, 栈偏移>
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std::map<unsigned, int> spill_offsets; // <溢出vreg, 栈偏移>
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};
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// 机器函数
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class MachineFunction {
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public:
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MachineFunction(const std::string& name) : name(name) {}
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MachineFunction(Function* func, RISCv64ISel* isel) : F(func), name(func->getName()), isel(isel) {}
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Function* getFunc() const { return F; }
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RISCv64ISel* getISel() const { return isel; }
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const std::string& getName() const { return name; }
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StackFrameInfo& getFrameInfo() { return frame_info; }
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// 同时提供 const 和 non-const 版本
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const std::vector<std::unique_ptr<MachineBasicBlock>>& getBlocks() const { return blocks; }
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std::vector<std::unique_ptr<MachineBasicBlock>>& getBlocks() { return blocks; }
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void addBlock(std::unique_ptr<MachineBasicBlock> block) {
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blocks.push_back(std::move(block));
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}
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private:
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Function* F;
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RISCv64ISel* isel; // 指向创建它的ISel,用于获取vreg映射等信息
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std::string name;
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std::vector<std::unique_ptr<MachineBasicBlock>> blocks;
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StackFrameInfo frame_info;
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};
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} // namespace sysy
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#endif // RISCV64_LLIR_H
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