Merge branch 'midend' of gitee.com:lixuanwang/mysysy into midend

This commit is contained in:
Lixuanwang
2025-08-03 17:26:38 +08:00

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@@ -79,6 +79,10 @@ void PassManager::runOptimizationPipeline(Module* moduleIR, IRBuilder* builderIR
this->addPass(&SysYAddReturnPass::ID); this->addPass(&SysYAddReturnPass::ID);
this->run(); this->run();
this->clearPasses();
this->addPass(&BuildCFG::ID);
this->run();
if(DEBUG) { if(DEBUG) {
std::cout << "=== IR After CFGOpt Optimizations ===\n"; std::cout << "=== IR After CFGOpt Optimizations ===\n";
printPasses(); printPasses();
@@ -119,7 +123,9 @@ void PassManager::runOptimizationPipeline(Module* moduleIR, IRBuilder* builderIR
std::cout << "=== IR After Reg2Mem Optimizations ===\n"; std::cout << "=== IR After Reg2Mem Optimizations ===\n";
printPasses(); printPasses();
} }
this->clearPasses();
this->addPass(&BuildCFG::ID);
this->run();
if (DEBUG) std::cout << "--- Custom optimization sequence finished ---\n"; if (DEBUG) std::cout << "--- Custom optimization sequence finished ---\n";
} }
@@ -134,6 +140,7 @@ void PassManager::runOptimizationPipeline(Module* moduleIR, IRBuilder* builderIR
SysYPrinter printer(moduleIR); SysYPrinter printer(moduleIR);
printer.printIR(); printer.printIR();
} }
} }
void PassManager::clearPasses() { void PassManager::clearPasses() {