[backend]继续增强寄存器分配器健壮性

src/include/backend/RISCv64/RISCv64LinearScan.h

@@ -36,7 +36,7 @@ struct LiveInterval {
 class RISCv64LinearScan {
 public:
     RISCv64LinearScan(MachineFunction* mfunc);
-    void run();
+    bool run();
 
 private:
     // --- 核心算法流程 ---
@@ -45,11 +45,9 @@ private:
     bool linearScan();
     void rewriteProgram();
     void applyAllocation();
-    void chooseRegForInterval(LiveInterval* current);
     void spillAtInterval(LiveInterval* current);
     
     // --- 辅助函数 ---
-    void getInstrUseDef(const MachineInstr* instr, std::set<unsigned>& use, std::set<unsigned>& def);
     bool isFPVReg(unsigned vreg) const;
     void collectUsedCalleeSavedRegs();
 
@@ -66,11 +64,12 @@ private:
     
     std::set<unsigned> spilled_vregs; // 记录在本轮被决定溢出的vreg
 
+    bool conservative_spill_mode = false;
+    const PhysicalReg SPILL_TEMP_REG = PhysicalReg::T4;
+
     // --- 寄存器池和分配结果 ---
     std::vector<PhysicalReg> allocable_int_regs;
     std::vector<PhysicalReg> allocable_fp_regs;
-    std::set<PhysicalReg> free_int_regs;
-    std::set<PhysicalReg> free_fp_regs;
     std::map<unsigned, PhysicalReg> vreg_to_preg_map;
     std::map<unsigned, PhysicalReg> abi_vreg_map;