[backend] it works 1.0
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@@ -1,7 +1,9 @@
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#include "RISCv32Backend.h"
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#include <sstream>
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#include <algorithm>
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namespace sysy {
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const std::vector<RISCv32CodeGen::PhysicalReg> RISCv32CodeGen::allocable_regs = {
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PhysicalReg::T0, PhysicalReg::T1, PhysicalReg::T2, PhysicalReg::T3,
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PhysicalReg::T4, PhysicalReg::T5, PhysicalReg::T6,
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@@ -33,16 +35,16 @@ std::string RISCv32CodeGen::code_gen() {
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std::string RISCv32CodeGen::module_gen() {
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std::stringstream ss;
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// 生成全局变量(数据段)
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for (auto global : *module->getGlobalValues()) {
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for (const auto& global : *module->getGlobalValues()) {
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ss << ".data\n";
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ss << ".globl " << global->getName() << "\n";
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ss << global->getName() << ":\n";
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ss << ".globl " << global.second->getName() << "\n";
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ss << global.second->getName() << ":\n";
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ss << " .word 0\n"; // 假设初始化为0
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}
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// 生成函数
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ss << ".text\n";
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for (auto func : *module->getFunctions()) {
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ss << function_gen(func);
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for (const auto& func : *module->getFunctions()) {
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ss << function_gen(func.second);
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}
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return ss.str();
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}
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@@ -52,17 +54,17 @@ std::string RISCv32CodeGen::function_gen(Function* func) {
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// 函数标签
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ss << ".globl " << func->getName() << "\n";
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ss << func->getName() << ":\n";
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// 序言:保存ra,分配堆栈
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bool is_leaf = true; // 简单假设,实际需检查是否调用其他函数
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ss << " addi sp, sp, -16\n"; // 分配堆栈空间
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ss << " sw ra, 12(sp)\n"; // 保存返回地址
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// 序言:保存 ra,分配堆栈
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bool is_leaf = true; // 简化假设
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ss << " addi sp, sp, -16\n";
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ss << " sw ra, 12(sp)\n";
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// 寄存器分配
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auto alloc = register_allocation(func);
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// 生成基本块代码
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for (auto bb : func->getBasicBlocks()) {
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ss << basicBlock_gen(bb, alloc);
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for (const auto& bb : func->getBasicBlocks()) {
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ss << basicBlock_gen(bb.get(), alloc);
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}
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// 结尾:恢复ra,释放堆栈
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// 结尾:恢复 ra,释放堆栈
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ss << " lw ra, 12(sp)\n";
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ss << " addi sp, sp, 16\n";
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ss << " ret\n";
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@@ -72,23 +74,28 @@ std::string RISCv32CodeGen::function_gen(Function* func) {
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std::string RISCv32CodeGen::basicBlock_gen(BasicBlock* bb, const RegAllocResult& alloc) {
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std::stringstream ss;
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ss << bb->getName() << ":\n";
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for (auto inst : bb->getInstructions()) {
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auto riscv_insts = instruction_gen(inst);
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for (const auto& inst : bb->getInstructions()) {
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auto riscv_insts = instruction_gen(inst.get());
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for (const auto& riscv_inst : riscv_insts) {
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ss << " " << riscv_inst.opcode;
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for (size_t i = 0; i < riscv_inst.operands.size(); ++i) {
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if (i > 0) ss << ", ";
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if (riscv_inst.operands[i].kind == Operand::Reg) {
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auto it = alloc.reg_map.find((Value*)riscv_inst.operands[i].value.c_str());
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if (riscv_inst.operands[i].kind == Operand::Kind::Reg) {
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auto it = alloc.reg_map.find(riscv_inst.operands[i].value);
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if (it != alloc.reg_map.end()) {
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ss << reg_to_string(it->second);
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} else {
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// 溢出到堆栈
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auto stack_it = alloc.stack_map.find((Value*)riscv_inst.operands[i].value.c_str());
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ss << "[sp+" << stack_it->second << "]";
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auto stack_it = alloc.stack_map.find(riscv_inst.operands[i].value);
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if (stack_it != alloc.stack_map.end()) {
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ss << stack_it->second << "(sp)";
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} else {
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ss << "%" << riscv_inst.operands[i].value->getName();
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}
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}
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} else if (riscv_inst.operands[i].kind == Operand::Kind::Imm) {
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ss << riscv_inst.operands[i].label;
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} else {
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ss << riscv_inst.operands[i].value;
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ss << riscv_inst.operands[i].label;
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}
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}
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ss << "\n";
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@@ -101,69 +108,50 @@ std::vector<RISCv32CodeGen::RISCv32Inst> RISCv32CodeGen::instruction_gen(Instruc
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std::vector<RISCv32Inst> insts;
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if (auto bin = dynamic_cast<BinaryInst*>(inst)) {
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std::string opcode;
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if (bin->getOpcode() == BinaryInst::Add) opcode = "add";
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else if (bin->getOpcode() == BinaryInst::Sub) opcode = "sub";
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else if (bin->getOpcode() == BinaryInst::Mul) opcode = "mul";
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else return insts; // 未实现其他操作
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if (bin->getKind() == BinaryInst::kAdd) opcode = "add";
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else if (bin->getKind() == BinaryInst::kSub) opcode = "sub";
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else if (bin->getKind() == BinaryInst::kMul) opcode = "mul";
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else return insts; // 其他操作未实现
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insts.emplace_back(opcode, std::vector<Operand>{
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{Operand::Reg, std::string((const char*)bin->getResult())},
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{Operand::Reg, std::string((const char*)bin->getLHS())},
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{Operand::Reg, std::string((const char*)bin->getRHS())}
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{Operand::Kind::Reg, bin},
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{Operand::Kind::Reg, bin->getLhs()},
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{Operand::Kind::Reg, bin->getRhs()}
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});
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} else if (auto load = dynamic_cast<LoadInst*>(inst)) {
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insts.emplace_back("lw", std::vector<Operand>{
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{Operand::Reg, std::string((const char*)load->getResult())},
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{Operand::Label, load->getPointer()->getName()}
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{Operand::Kind::Reg, load},
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{Operand::Kind::Label, load->getPointer()->getName()}
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});
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} else if (auto store = dynamic_cast<StoreInst*>(inst)) {
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insts.emplace_back("sw", std::vector<Operand>{
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{Operand::Reg, std::string((const char*)store->getValue())},
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{Operand::Label, store->getPointer()->getName()}
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{Operand::Kind::Reg, store->getValue()},
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{Operand::Kind::Label, store->getPointer()->getName()}
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});
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} // 其他指令类型待实现
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}
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return insts;
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}
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void RISCv32CodeGen::eliminate_phi(Function* func) {
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// 简单实现:假设CopyInst存在
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for (auto bb : func->getBasicBlocks()) {
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for (auto inst : bb->getInstructions()) {
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if (/* inst is PhiInst */) {
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// 插入CopyInst到前驱块
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// 移除phi指令
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}
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}
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}
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// TODO: 实现 phi 指令消除
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}
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std::map<Instruction*, std::set<Value*>> RISCv32CodeGen::liveness_analysis(Function* func) {
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std::map<Instruction*, std::set<Value*>> live_sets;
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// 简单实现:需实际计算活跃性
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// TODO: 实现活跃性分析
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return live_sets;
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}
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std::map<Value*, std::set<Value*>> RISCv32CodeGen::build_interference_graph(
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const std::map<Instruction*, std::set<Value*>>& live_sets) {
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std::map<Value*, std::set<Value*>> graph;
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// 简单实现:需实际构建干扰图
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// TODO: 实现干扰图构建
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return graph;
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}
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RISCv32CodeGen::RegAllocResult RISCv32CodeGen::register_allocation(Function* func) {
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RegAllocResult result;
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eliminate_phi(func);
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auto live_sets = liveness_analysis(func);
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auto graph = build_interference_graph(live_sets);
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// 图着色算法
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std::vector<Value*> stack;
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std::map<Value*, int> degrees;
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for (const auto& pair : graph) {
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degrees[pair.first] = pair.second.size();
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if (degrees[pair.first] < allocable_regs.size()) {
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stack.push_back(pair.first);
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}
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}
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// 简单实现:需完成图着色和溢出处理
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// TODO: 实现寄存器分配
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return result;
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}
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}
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} // namespace sysy
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