b894619d1b
- make should be $(MAKE) - add + in front of rules spawning long-lasted make process in a subshell. (This would not be needed with $(MAKE) -C .. target, but our makefiles do not handle that because they use $(PWD)) - split the main 'all' rule as all 4 targets are independant - fix dependencies where appropriate for parallelism Extra, not speed-related changes: - remove some double-colon for targets as they do not need it This cuts build time from 5s to 1.5s on a laptop with -j4, and more importantly from 85s to 35s on a KNL node. As a bonus, the fixed dependencies removes the need to clean before rebuilding all the time. Probably.
53 lines
1.3 KiB
Makefile
53 lines
1.3 KiB
Makefile
BUILD_TARGET ?= @TARGET@
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KERNDIR=@KERNDIR@
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VPATH=@abs_srcdir@
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ifeq ($(ARCH), arm64)
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vdsodir=@abs_builddir@/../arch/$(ARCH)/kernel/vdso
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endif
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IHKBASE ?= $(VPATH)/../../ihk/cokernel
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O ?= $(CURDIR)/build
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V ?= $(VERBOSE)
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KERNEL = kernel.img
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KERNELS = $(addsuffix /$(KERNEL),$(addprefix $(O)/,$(BUILD_TARGET)))
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SUBCMD_OPTS = V='$(V)' BUILD_IHK_COKERNEL=@abs_builddir@/../../ihk/cokernel
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$(if $(O),,$(error Specify the compilation target directory))
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#$(if $(shell ls $(IHKBASE)/Makefile),,\
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# $(error IHK is not found in $(IHKBASE)))
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.PHONY: all clean depend install
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all: $(O) $(KERNELS)
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$(O):
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mkdir -p $(O)
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%/kernel.img: %/Makefile $(KERNELS)
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@echo 'Building for' $(dir $@)
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+@make --no-print-directory -C $(dir $@) $(SUBCMD_OPTS)
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%/Makefile: Makefile.build FORCE
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@mkdir -p $(dir $@)
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@echo 'SRC = $(SRC)' > $@
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@echo 'IHKBASE = $(IHKBASE)' >> $@
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@echo 'TARGET = $(notdir $(patsubst %/,%,$(dir $@)))' >> $@
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@echo 'TARGETDIR = $$(shell echo $$(TARGET) | sed "s/-/\//")' >> $@
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@cat Makefile.build >> $@
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@rm -f $(dir $@)/Makefile.dep
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clean:
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rm -rf $(O)
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ifeq ($(ARCH), arm64)
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@rm -f $(vdsodir)/*.o $(vdsodir)/vdso.* $(vdsodir)/Makefile.dep -r $(vdsodir)/../include
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endif
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install:
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mkdir -p -m 755 $(KERNDIR)
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install -m 755 $(O)/$(BUILD_TARGET)/kernel.img $(KERNDIR)/mckernel.img
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FORCE:
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