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freeze: change freeze-thaw to normal interrupt

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Change-Id: Ib4dbac28f0074595e92ef316945b37ef4bc18327
This commit is contained in:
TOIDA,Suguru
2019-08-27 13:32:37 +09:00
committed by Masamichi Takagi
parent 299d47abf5
commit ff982b8594
8 changed files with 67 additions and 33 deletions
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40
arch/x86_64/kernel/interrupt.S
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@@ -1,3 +1,4 @@
/* interrupt.S COPYRIGHT FUJITSU LIMITED 2019 */
/**
* \file interrupt.S
* License details are found in the file LICENSE.
@@ -91,6 +92,9 @@ vector=vector+1
.endr
common_interrupt:
#define MULT_INTR_VECTOR 242
cmp $(MULT_INTR_VECTOR),%rdi
je 1f
PUSH_ALL_REGS
movq ERROR_OFFSET(%rsp), %rdi
movq %rsp, %rsi
@@ -98,6 +102,23 @@ common_interrupt:
POP_ALL_REGS
addq $8, %rsp
iretq
1:
#define PANIC_REGS 240
movq %rax,%gs:PANIC_REGS+0x00
movq %rsp,%gs:PANIC_REGS+0x08
cld
movq %gs:PANIC_REGS+0x00,%rax
PUSH_ALL_REGS
subq $40, %rsp
movq %rsp,%gs:PANIC_REGS+0x10
movq %rsp, %rdi
call freeze_thaw
cmpq $0, %rax
jnz 2f
addq $40, %rsp
2:
POP_ALL_REGS
iretq
.globl __page_fault_handler_address
__page_fault_handler_address:
@@ -140,31 +161,12 @@ __freeze:
.globl nmi
nmi:
#define PANICED 232
#define PANIC_REGS 240
movq %rax,%gs:PANIC_REGS+0x00
movq %rsp,%gs:PANIC_REGS+0x08
movl nmi_mode(%rip),%eax
cmp $3,%rax
je 4f
cmp $1,%rax
je 1f
cmp $2,%rax
jne 3f
1:
cld
movq %gs:PANIC_REGS+0x00,%rax
PUSH_ALL_REGS
subq $40, %rsp
movq %rsp,%gs:PANIC_REGS+0x10
movq %rsp, %rdi
call freeze_thaw
cmpq $0, %rax
jnz 2f
addq $40, %rsp
2:
POP_ALL_REGS
iretq
3:
movq %rbx,%gs:PANIC_REGS+0x08
movq %rcx,%gs:PANIC_REGS+0x10