From cec6f2455963f9dbf0c274285f06d63484602580 Mon Sep 17 00:00:00 2001 From: "TOIDA,Suguru" Date: Fri, 21 Feb 2020 16:05:46 +0900 Subject: [PATCH] PMU register support for cpufreq driver. Change-Id: I11462d25ef83867ddf2e643798d1e3d0257f7f33 --- arch/arm64/kernel/cpu.c | 2 ++ arch/arm64/kernel/include/imp-sysreg.h | 1 + 2 files changed, 3 insertions(+) diff --git a/arch/arm64/kernel/cpu.c b/arch/arm64/kernel/cpu.c index 6730b9f4..747cb03d 100644 --- a/arch/arm64/kernel/cpu.c +++ b/arch/arm64/kernel/cpu.c @@ -1682,6 +1682,7 @@ static inline int arch_cpu_mrs(uint32_t sys_reg, uint64_t *val) SYSREG_READ_S(IMP_PF_INJECTION_DISTANCE5_EL0); SYSREG_READ_S(IMP_PF_INJECTION_DISTANCE6_EL0); SYSREG_READ_S(IMP_PF_INJECTION_DISTANCE7_EL0); + SYSREG_READ_S(IMP_PF_PMUSERENR_EL0); SYSREG_READ_S(IMP_BARRIER_CTRL_EL1); SYSREG_READ_S(IMP_BARRIER_BST_BIT_EL1); SYSREG_READ_S(IMP_BARRIER_INIT_SYNC_BB0_EL1); @@ -1752,6 +1753,7 @@ static inline int arch_cpu_msr(uint32_t sys_reg, uint64_t val) SYSREG_WRITE_S(IMP_PF_INJECTION_DISTANCE5_EL0); SYSREG_WRITE_S(IMP_PF_INJECTION_DISTANCE6_EL0); SYSREG_WRITE_S(IMP_PF_INJECTION_DISTANCE7_EL0); + SYSREG_WRITE_S(IMP_PF_PMUSERENR_EL0); SYSREG_WRITE_S(IMP_BARRIER_CTRL_EL1); SYSREG_WRITE_S(IMP_BARRIER_BST_BIT_EL1); SYSREG_WRITE_S(IMP_BARRIER_INIT_SYNC_BB0_EL1); diff --git a/arch/arm64/kernel/include/imp-sysreg.h b/arch/arm64/kernel/include/imp-sysreg.h index 4bacdaa8..28b80fb8 100644 --- a/arch/arm64/kernel/include/imp-sysreg.h +++ b/arch/arm64/kernel/include/imp-sysreg.h @@ -29,6 +29,7 @@ #define IMP_PF_INJECTION_DISTANCE5_EL0 sys_reg(3, 3, 11, 7, 5) #define IMP_PF_INJECTION_DISTANCE6_EL0 sys_reg(3, 3, 11, 7, 6) #define IMP_PF_INJECTION_DISTANCE7_EL0 sys_reg(3, 3, 11, 7, 7) +#define IMP_PF_PMUSERENR_EL0 sys_reg(3, 3, 9, 14, 0) #define IMP_BARRIER_CTRL_EL1 sys_reg(3, 0, 11, 12, 0) #define IMP_BARRIER_BST_BIT_EL1 sys_reg(3, 0, 11, 12, 4) #define IMP_BARRIER_INIT_SYNC_BB0_EL1 sys_reg(3, 0, 15, 13, 0)