MCS: fix ARM64 issue by using smp_XXX() functions (i.e., barrier()s)

Change-Id: I41470c082308c7c1ac91f88db2229958398d2e68

arch/x86_64/kernel/include/arch/cpu.h

@@ -42,4 +42,12 @@ static inline unsigned long read_tsc(void)
 	___p1;								\
 })
 
+#define smp_store_release(p, v)			\
+({							\
+	compiletime_assert_atomic_type(*p);	\
+	barrier();							\
+	WRITE_ONCE(*p, v);					\
+})
+
+
 #endif /* ARCH_CPU_H */