ARM: fix performance counters allocation

Change-Id: Ie6c8beacf268462064f59b063d9c7b635c906dc4

arch/arm64/kernel/include/asm-syscall.h

@@ -8,6 +8,7 @@
 #define SYSCALL_HANDLED(number, name)	DECLARATOR(number, name)
 #define SYSCALL_DELEGATED(number, name)	DECLARATOR(number, name)
 
+#include <config.h>
 #include <syscall_list.h>
 
 #undef DECLARATOR

arch/arm64/kernel/include/syscall_list.h

@@ -111,7 +111,7 @@ SYSCALL_HANDLED(236, get_mempolicy)
 SYSCALL_HANDLED(237, set_mempolicy)
 SYSCALL_HANDLED(238, migrate_pages)
 SYSCALL_HANDLED(239, move_pages)
-#ifdef PERF_ENABLE
+#ifdef ENABLE_PERF
 SYSCALL_HANDLED(241, perf_event_open)
 #else // PERF_ENABLE
 SYSCALL_DELEGATED(241, perf_event_open)

arch/arm64/kernel/perfctr.c

@@ -8,6 +8,7 @@
 #include <string.h>
 #include <ihk/mm.h>
 #include <irq.h>
+#include <process.h>
 
 /*
  * @ref.impl arch/arm64/kernel/perf_event.c
@@ -198,6 +199,27 @@ int ihk_mc_perfctr_read_mask(unsigned long counter_mask, unsigned long *value)
 	return 0;
 }
 
+int ihk_mc_perfctr_alloc(struct thread *thread, int cpu_cycles)
+{
+	int ret = -EINVAL;
+	int i = 1;
+	const int counters = ihk_mc_perf_get_num_counters();
+
+	// Counter 0 is only used for CPU cycles on ARM
+	if (cpu_cycles) {
+		i = 0;
+	}
+
+	for (; i < counters; i++) {
+		if (!(thread->pmc_alloc_map & (1 << i))) {
+			ret = i;
+			break;
+		}
+	}
+
+	return ret;
+}
+
 unsigned long ihk_mc_perfctr_read(int counter)
 {
 	unsigned long count;

arch/x86_64/kernel/perfctr.c

@@ -17,6 +17,7 @@
 #include <mc_perf_event.h>
 #include <config.h>
 #include <ihk/debug.h>
+#include <process.h>
 
 extern unsigned int *x86_march_perfmap;
 extern int running_on_kvm(void);
@@ -411,6 +412,23 @@ int ihk_mc_perfctr_read_mask(unsigned long counter_mask, unsigned long *value)
 	return 0;
 }
 
+int ihk_mc_perfctr_alloc(struct thread *thread, int cpu_cycles)
+{
+	int ret = -EINVAL;
+	int i = 0;
+	const int counters = ihk_mc_perf_get_num_counters();
+
+	// find avail generic counter
+	for (i = 0; i < counters; i++) {
+		if (!(thread->pmc_alloc_map & (1 << i))) {
+			ret = i;
+			break;
+		}
+	}
+
+	return ret;
+}
+
 unsigned long ihk_mc_perfctr_read(int counter)
 {
 	unsigned long retval = 0;

kernel/syscall.c

@@ -3689,24 +3689,6 @@ SYSCALL_DECLARE(signalfd4)
 }
 
 #ifdef ENABLE_PERF
-int
-perf_counter_alloc(struct thread *thread)
-{
-	int ret = -EINVAL;
-	int i = 0;
-	const int counters = ihk_mc_perf_get_num_counters();
-
-	// find avail generic counter
-	for (i = 0; i < counters; i++) {
-		if(!(thread->pmc_alloc_map & (1 << i))) {
-			ret = i;
-			break;
-		}
-	}
-
-	return ret;
-}
-
 int perf_counter_set(struct mc_perf_event *event)
 {
 	int ret = 0;
@@ -4102,7 +4084,7 @@ static int mc_perf_event_alloc(struct mc_perf_event **out,
 	event->child_count_total = 0;
 	event->parent = NULL;
 
-	switch(attr->type) {
+	switch (attr->type) {
 	case PERF_TYPE_HARDWARE :
 		val = ihk_mc_hw_event_map(attr->config);
 		break;
@@ -4204,7 +4186,9 @@ SYSCALL_DECLARE(perf_event_open)
 
 	event->pid = pid;
 
-	counter_idx = perf_counter_alloc(thread);
+	counter_idx = ihk_mc_perfctr_alloc(thread,
+			(attr->type == PERF_TYPE_HARDWARE &&
+			 attr->config == PERF_COUNT_HW_CPU_CYCLES));
 	if (counter_idx < 0) {
 		return counter_idx;
 	}

lib/include/ihk/perfctr.h

@@ -19,6 +19,7 @@
 #endif /*POSTK_DEBUG_TEMP_FIX_29*/
 
 #include <mc_perf_event.h>
+#include <process.h>
 
 #define PERFCTR_USER_MODE   0x01
 #define PERFCTR_KERNEL_MODE 0x02
@@ -73,6 +74,7 @@ int ihk_mc_perfctr_read_mask(unsigned long counter_mask, unsigned long *value);
 unsigned long ihk_mc_perfctr_read(int counter);
 unsigned long ihk_mc_perfctr_read_msr(int counter);
 int ihk_mc_perfctr_alloc_counter(unsigned int *type, unsigned long *config, unsigned long pmc_status);
+int ihk_mc_perfctr_alloc(struct thread *thread, int cpu_cycles);
 int ihk_mc_perf_counter_mask_check(unsigned long counter_mask);
 int ihk_mc_perf_get_num_counters(void);