add arm64 support
- add arm64 dependent codes with GICv3 and SVE support - fix bugs based on architecture separation requests
This commit is contained in:
Takayuki Okamoto
7
arch/arm64/kernel/include/arch/auxvec.h
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7
arch/arm64/kernel/include/arch/auxvec.h
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/* auxvec.h COPYRIGHT FUJITSU LIMITED 2016 */
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#ifndef __HEADER_ARM64_ARCH_AUXVEC_H
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#define __HEADER_ARM64_ARCH_AUXVEC_H
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#define AT_SYSINFO_EHDR 33
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#endif /* __HEADER_ARM64_ARCH_AUXVEC_H */
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103
arch/arm64/kernel/include/arch/cpu.h
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arch/arm64/kernel/include/arch/cpu.h
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/* cpu.h COPYRIGHT FUJITSU LIMITED 2016-2017 */
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#ifndef __HEADER_ARM64_ARCH_CPU_H
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#define __HEADER_ARM64_ARCH_CPU_H
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#ifndef __ASSEMBLY__
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#define sev() asm volatile("sev" : : : "memory")
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#define wfe() asm volatile("wfe" : : : "memory")
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#define wfi() asm volatile("wfi" : : : "memory")
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#define isb() asm volatile("isb" : : : "memory")
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#define dmb(opt) asm volatile("dmb " #opt : : : "memory")
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#define dsb(opt) asm volatile("dsb " #opt : : : "memory")
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#define mb() dsb(sy)
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#define rmb() dsb(ld)
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#define wmb() dsb(st)
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#define dma_rmb() dmb(oshld)
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#define dma_wmb() dmb(oshst)
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//#ifndef CONFIG_SMP
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//#else
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#define smp_mb() dmb(ish)
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#define smp_rmb() dmb(ishld)
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#define smp_wmb() dmb(ishst)
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 4: \
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asm volatile ("stlr %w1, %0" \
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: "=Q" (*p) : "r" (v) : "memory"); \
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break; \
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case 8: \
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asm volatile ("stlr %1, %0" \
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: "=Q" (*p) : "r" (v) : "memory"); \
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break; \
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} \
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} while (0)
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#define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1; \
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compiletime_assert_atomic_type(*p); \
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switch (sizeof(*p)) { \
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case 4: \
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asm volatile ("ldar %w0, %1" \
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: "=r" (___p1) : "Q" (*p) : "memory"); \
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break; \
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case 8: \
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asm volatile ("ldar %0, %1" \
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: "=r" (___p1) : "Q" (*p) : "memory"); \
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break; \
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} \
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___p1; \
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})
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//#endif /*CONFIG_SMP*/
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#define read_barrier_depends() do { } while(0)
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#define smp_read_barrier_depends() do { } while(0)
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#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
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#define nop() asm volatile("nop");
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#define smp_mb__before_atomic() smp_mb()
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#define smp_mb__after_atomic() smp_mb()
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/* @ref.impl linux-linaro/arch/arm64/include/asm/arch_timer.h::arch_counter_get_cntvct */
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#define read_tsc() \
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({ \
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unsigned long cval; \
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isb(); \
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asm volatile("mrs %0, cntvct_el0" : "=r" (cval)); \
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cval; \
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})
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void init_tod_data(void);
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#if defined(CONFIG_HAS_NMI)
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static inline void cpu_enable_nmi(void)
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{
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asm volatile("msr daifclr, #2": : : "memory");
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}
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static inline void cpu_disable_nmi(void)
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{
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asm volatile("msr daifset, #2": : : "memory");
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}
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#else/*defined(CONFIG_HAS_NMI)*/
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static inline void cpu_enable_nmi(void)
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{
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}
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static inline void cpu_disable_nmi(void)
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{
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}
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#endif/*defined(CONFIG_HAS_NMI)*/
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#endif /* __ASSEMBLY__ */
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#endif /* !__HEADER_ARM64_ARCH_CPU_H */
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17
arch/arm64/kernel/include/arch/mm.h
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arch/arm64/kernel/include/arch/mm.h
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/* mm.h COPYRIGHT FUJITSU LIMITED 2016 */
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#ifndef __HEADER_ARM64_ARCH_MM_H
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#define __HEADER_ARM64_ARCH_MM_H
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struct process_vm;
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static inline void
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flush_nfo_tlb()
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{
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}
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static inline void
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flush_nfo_tlb_mm(struct process_vm *vm)
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{
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}
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#endif /* __HEADER_ARM64_ARCH_MM_H */
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37
arch/arm64/kernel/include/arch/mman.h
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arch/arm64/kernel/include/arch/mman.h
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@@ -0,0 +1,37 @@
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/* mman.h COPYRIGHT FUJITSU LIMITED 2015-2016 */
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/* @ref.impl linux-linaro/include/uapi/asm-generic/mman.h */
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#ifndef __HEADER_ARM64_ARCH_MMAN_H
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#define __HEADER_ARM64_ARCH_MMAN_H
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#include <arch-memory.h>
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/*
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* mapping flags
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*/
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#define MAP_GROWSDOWN 0x0100 /* stack-like segment */
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#define MAP_DENYWRITE 0x0800 /* ETXTBSY */
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#define MAP_EXECUTABLE 0x1000 /* mark it as an executable */
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#define MAP_LOCKED 0x2000 /* pages are locked */
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#define MAP_NORESERVE 0x4000 /* don't check for reservations */
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#define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */
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#define MAP_NONBLOCK 0x10000 /* do not block on IO */
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#define MAP_STACK 0x20000 /* give out an address that is best suited for process/thread stacks */
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#define MAP_HUGETLB 0x40000 /* create a huge page mapping */
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/* Bits [26:31] are reserved, see mman-common.h for MAP_HUGETLB usage */
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#define MAP_HUGE_SHIFT 26
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#if FIRST_LEVEL_BLOCK_SUPPORT
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# define MAP_HUGE_FIRST_BLOCK (__PTL3_SHIFT << MAP_HUGE_SHIFT)
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#else
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# define MAP_HUGE_FIRST_BLOCK -1 /* not supported */
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#endif
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#define MAP_HUGE_SECOND_BLOCK (__PTL2_SHIFT << MAP_HUGE_SHIFT)
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/*
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* for mlockall()
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*/
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#define MCL_CURRENT 1 /* lock all current mappings */
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#define MCL_FUTURE 2 /* lock all future mappings */
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#endif /* __HEADER_ARM64_ARCH_MMAN_H */
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60
arch/arm64/kernel/include/arch/rusage.h
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60
arch/arm64/kernel/include/arch/rusage.h
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@@ -0,0 +1,60 @@
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#ifndef ARCH_RUSAGE_H_INCLUDED
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#define ARCH_RUSAGE_H_INCLUDED
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#define DEBUG_RUSAGE
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#define IHK_OS_PGSIZE_4KB 0
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#define IHK_OS_PGSIZE_2MB 1
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#define IHK_OS_PGSIZE_1GB 2
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extern struct ihk_os_monitor *monitor;
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extern int sprintf(char * buf, const char *fmt, ...);
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#define DEBUG_ARCH_RUSAGE
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#ifdef DEBUG_ARCH_RUSAGE
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#define dprintf(...) \
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do { \
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char msg[1024]; \
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sprintf(msg, __VA_ARGS__); \
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kprintf("%s,%s", __FUNCTION__, msg); \
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} while (0);
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#define eprintf(...) \
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do { \
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char msg[1024]; \
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sprintf(msg, __VA_ARGS__); \
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kprintf("%s,%s", __FUNCTION__, msg); \
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} while (0);
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#else
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#define dprintf(...) do { } while (0)
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#define eprintf(...) \
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do { \
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char msg[1024]; \
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sprintf(msg, __VA_ARGS__); \
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kprintf("%s,%s", __FUNCTION__, msg); \
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} while (0);
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#endif
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static inline int rusage_pgsize_to_pgtype(size_t pgsize)
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{
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int ret = IHK_OS_PGSIZE_4KB;
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#if 0 /* postk-TODO */
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switch (pgsize) {
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case PTL1_SIZE:
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ret = IHK_OS_PGSIZE_4KB;
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break;
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case PTL2_SIZE:
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ret = IHK_OS_PGSIZE_2MB;
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break;
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case PTL3_SIZE:
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ret = IHK_OS_PGSIZE_1GB;
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break;
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default:
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eprintf("unknown pgsize=%ld\n", pgsize);
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break;
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}
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#endif
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return ret;
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}
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#endif /* !defined(ARCH_RUSAGE_H_INCLUDED) */
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41
arch/arm64/kernel/include/arch/shm.h
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arch/arm64/kernel/include/arch/shm.h
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@@ -0,0 +1,41 @@
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/* shm.h COPYRIGHT FUJITSU LIMITED 2015-2016 */
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#ifndef __HEADER_ARM64_ARCH_SHM_H
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#define __HEADER_ARM64_ARCH_SHM_H
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#include <arch-memory.h>
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/* shmflg */
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#define SHM_HUGE_SHIFT 26
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#if FIRST_LEVEL_BLOCK_SUPPORT
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# define SHM_HUGE_FIRST_BLOCK (__PTL3_SHIFT << SHM_HUGE_SHIFT)
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#else
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# define SHM_HUGE_FIRST_BLOCK -1 /* not supported */
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#endif
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#define SHM_HUGE_SECOND_BLOCK (__PTL2_SHIFT << SHM_HUGE_SHIFT)
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struct ipc_perm {
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key_t key;
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uid_t uid;
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gid_t gid;
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uid_t cuid;
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gid_t cgid;
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uint16_t mode;
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uint8_t padding[2];
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uint16_t seq;
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uint8_t padding2[22];
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};
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struct shmid_ds {
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struct ipc_perm shm_perm;
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size_t shm_segsz;
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time_t shm_atime;
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time_t shm_dtime;
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time_t shm_ctime;
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pid_t shm_cpid;
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pid_t shm_lpid;
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uint64_t shm_nattch;
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uint8_t padding[12];
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int init_pgshift;
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};
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#endif /* __HEADER_ARM64_ARCH_SHM_H */
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