Test "Scalable Vector Extension (SVE) support." on arm64
Change-Id: I3abaca932985a06b06887b962e769f2eac96c738
This commit is contained in:
Shiratori, Takehiro
committed by
Masamichi Takagi
Masamichi Takagi
parent
6810506c3d
commit
7da5fede8b
389
test/sve/src/sve.c
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389
test/sve/src/sve.c
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/* sve.c COPYRIGHT FUJITSU LIMITED 2016-2019 */
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/prctl.h>
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#include <errno.h>
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#include "sve.h"
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#include "common.h"
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static unsigned long sve_magic[] = {
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0x1111111111111111, 0x2222222222222222,
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0x3333333333333333, 0x4444444444444444,
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0x5555555555555555, 0x6666666666666666,
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0x7777777777777777, 0x8888888888888888,
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0x9999999999999999, 0xaaaaaaaaaaaaaaaa,
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0xbbbbbbbbbbbbbbbb, 0xcccccccccccccccc,
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0xdddddddddddddddd, 0xeeeeeeeeeeeeeeee,
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0xffffffffffffffff, 0x1111111122222222,
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0x2222222233333333, 0x3333333344444444,
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0x4444444455555555, 0x5555555566666666,
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0x6666666677777777, 0x7777777788888888,
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0x99999999aaaaaaaa, 0xaaaaaaaabbbbbbbb,
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0xbbbbbbbbcccccccc, 0xccccccccdddddddd,
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0xddddddddeeeeeeee, 0xeeeeeeeeffffffff,
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0xffffffff11111111, 0x1111222233334444,
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0x5555666677778888, 0x9999aaaabbbbcccc,
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0xddddeeeeffff1111, 0xffffeeeeddddcccc,
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0xbbbbaaaa99998888, 0x7777666655554444,
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0x333322221111ffff, 0x1122334455667788,
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0x99aabbccddeeff11, 0xffeeddccbbaa9988,
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0x77665544332211ff, 0x123456789abcdef1,
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0xfedcba987654321f, 0xcafecafecafecafe
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};
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unsigned int gen_set_vl(const unsigned int vl)
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{
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switch (vl) {
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case VL_128_BIT:
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return VL_256_BIT;
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case VL_256_BIT:
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return VL_512_BIT;
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case VL_512_BIT:
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return VL_128_BIT;
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default:
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break;
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}
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return -1;
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}
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static int compare_vl_flags(const unsigned int exp, const unsigned int target,
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const unsigned int onexec_vl)
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{
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int ret = 0;
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const unsigned int exp_vl = PR_SVE_GET_VL_LEN(exp);
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unsigned int exp_flags = PR_SVE_GET_VL_FLAGS(exp);
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const unsigned int target_vl = PR_SVE_GET_VL_LEN(target);
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const unsigned int target_flags = PR_SVE_GET_VL_FLAGS(target);
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const unsigned int rd_vl = sve_get_vl();
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unsigned int exp_rdvl = 0;
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/* PR_SVE_SET_VL_ONEXEC flag is set only. */
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exp_flags &= ~PR_SVE_SET_VL_ONEXEC;
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if (onexec_vl == 0) {
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exp_rdvl = exp_vl;
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}
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else {
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exp_rdvl = onexec_vl;
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}
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if (exp_vl != target_vl) {
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printf("Expected VL(0x%x) != Target VL(0x%x).\n",
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exp_vl, target_vl);
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ret = -1;
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}
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if (exp_flags != target_flags) {
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printf("Expected FLAGS(0x%x) != Target FLAGS(0x%x).\n",
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exp_flags, target_flags);
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ret = -1;
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}
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if (exp_rdvl != rd_vl) {
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printf("Expected VL(0x%x) != VL on Register(0x%x).\n",
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exp_rdvl, rd_vl);
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ret = -1;
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}
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if (ret == -1) {
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printf("Expected VALUE (0x%x), Target VALUE (0x%x).\n",
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(exp & ~PR_SVE_SET_VL_ONEXEC), target);
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}
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return ret;
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}
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int get_and_compare_vl(const unsigned long exp_arg)
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{
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int ret = -1;
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int vl_flags = 0;
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vl_flags = prctl(PR_SVE_GET_VL);
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if (vl_flags == -1) {
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perror("prctl(PR_SVE_GET_VL)");
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ret = errno;
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}
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else {
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printf("Get VL(0x%x), FLAGS(0x%x)\n",
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PR_SVE_GET_VL_LEN(vl_flags),
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PR_SVE_GET_VL_FLAGS(vl_flags));
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ret = compare_vl_flags(exp_arg, vl_flags, 0);
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}
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return ret;
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}
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int set_and_compare_vl(const unsigned long set_arg)
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{
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int ret = 0;
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int vl_flags = 0;
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const int onexec = ((set_arg & PR_SVE_SET_VL_ONEXEC) ? 1 : 0);
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unsigned long exp_vl = PR_SVE_GET_VL_LEN(set_arg);
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unsigned long exp_flags = PR_SVE_GET_VL_FLAGS(set_arg);
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unsigned int onexec_vl = 0;
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printf("Set VL(0x%lx), FLAGS(0x%lx)\n",
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PR_SVE_GET_VL_LEN(set_arg),
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PR_SVE_GET_VL_FLAGS(set_arg));
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if (onexec) {
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int exp_arg = 0;
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exp_arg = prctl(PR_SVE_GET_VL);
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if (exp_arg == -1) {
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perror("prctl(PR_SVE_GET_VL)");
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ret = errno;
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goto out;
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}
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else {
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onexec_vl = PR_SVE_GET_VL_LEN(exp_arg);
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}
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}
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vl_flags = prctl(PR_SVE_SET_VL, set_arg);
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if (vl_flags == -1) {
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perror("prctl(PR_SVE_SET_VL)");
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ret = errno;
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}
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else {
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ret = compare_vl_flags(exp_vl | exp_flags, vl_flags, onexec_vl);
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}
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out:
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return ret;
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}
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void gen_test_sve(void *buf, unsigned int vq)
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{
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struct fpsimd_sve_state(vq) * svereg = buf;
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unsigned long *pzreg = (unsigned long *)svereg->zregs;
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unsigned int sve_magic_num = ARRAY_SIZE(sve_magic);
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int i = 0, j = 0;
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/* zregs */
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for (i = 0; i < 32; i++) {
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for (j = 0; j < vq * 2; j++) {
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int k = i * vq * 2;
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pzreg[k + j] = sve_magic[(k + j) % sve_magic_num];
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}
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}
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/* pregs */
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for (i = 0; i < 16; i++) {
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for (j = 0; j < vq; j++) {
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int k = i * vq;
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svereg->pregs[i][j] =
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(unsigned short)
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(sve_magic[(k + j) % sve_magic_num]);
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}
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}
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/* ffr */
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for (i = 0; i < vq; i++) {
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svereg->ffr[i] = (unsigned short)(sve_magic[i % sve_magic_num]);
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}
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}
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void gen_test_sve_low_128(void *buf, unsigned int bf_vq, unsigned int af_vq)
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{
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struct fpsimd_sve_state(bf_vq) tmp_buf;
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struct fpsimd_sve_state(af_vq) * svereg = buf;
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int i = 0;
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memset(&tmp_buf, 0, sizeof(tmp_buf));
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gen_test_sve(&tmp_buf, bf_vq);
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/* zregs */
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for (i = 0; i < 32; i++) {
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svereg->zregs[i][0] = tmp_buf.zregs[i][0];
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}
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}
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void gen_test_fpsimd(struct user_fpsimd_state *buf, unsigned int vq)
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{
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int i = 0;
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struct fpsimd_sve_state(vq) svereg;
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gen_test_sve(&svereg, vq);
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for (i = 0; i < 32; i++) {
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buf->vregs[i] = svereg.zregs[i][0];
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}
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}
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void gen_test_sve_dirty(void *buf, unsigned int vq)
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{
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struct fpsimd_sve_state(vq) * svereg = buf;
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memset(svereg, 0xda, sizeof(*svereg));
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}
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void write_sve(void *buf, unsigned int vq, unsigned int *fpscr)
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{
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struct fpsimd_sve_state(vq) * svereg = buf;
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sve_load_state(svereg->ffr, fpscr);
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}
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void read_sve(void *buf, unsigned int vq, unsigned int *fpscr)
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{
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struct fpsimd_sve_state(vq) * svereg = buf;
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sve_save_state(svereg->ffr, fpscr);
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}
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void show_sve(const void *buf, unsigned int vq, unsigned int *fpscr)
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{
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const struct fpsimd_sve_state(vq) * svereg = buf;
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int i = 0, j = 0;
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unsigned long *pzreg = (unsigned long *)svereg->zregs;
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/* zregs */
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for (i = 0; i < 32; i++) {
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printf("z%2d: ", i);
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for (j = 0; j < vq * 2; j++) {
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int k = i * vq * 2;
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if ((j != 0) && (j % 4 == 0)) {
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printf("\n");
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printf(" ");
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}
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printf("0x%016lx ", pzreg[k + j]);
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}
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printf("\n");
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}
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/* pregs */
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for (i = 0; i < 16; i++) {
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printf("p%2d: ", i);
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for (j = 0; j < vq; j++) {
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printf("0x%04x ", svereg->pregs[i][j]);
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}
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printf("\n");
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}
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/* ffr */
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for (i = 0; i < vq; i++) {
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printf("ffr%2d: 0x%04x\n", i, svereg->ffr[i]);
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}
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printf("fpsr: 0x%08x\n", fpscr[0]);
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printf("fpcr: 0x%08x\n", fpscr[1]);
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}
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void read_and_show_sve(void *buf, unsigned int vq, unsigned int *fpscr)
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{
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read_sve(buf, vq, fpscr);
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show_sve(buf, vq, fpscr);
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}
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int header_compare(const struct user_sve_header *target)
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{
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int ret = -1;
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unsigned int vq, max_vq;
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if (!sve_vl_valid(target->vl)) {
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printf("VL invalid.\n");
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goto out;
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}
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vq = sve_vq_from_vl(target->vl);
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if (!sve_vl_valid(target->max_vl)) {
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printf("MAX-VL invalid.\n");
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goto out;
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}
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max_vq = sve_vq_from_vl(target->max_vl);
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if (!(target->flags & SVE_PT_REGS_SVE)) {
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printf("FLAGS invalid.\n");
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goto out;
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}
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if (target->size != SVE_PT_SIZE(vq, target->flags)) {
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printf("SIZE invalid.\n");
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goto out;
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}
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if (target->max_size != SVE_PT_SIZE(max_vq, SVE_PT_REGS_SVE)) {
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printf("MAX-SIZE invalid.\n");
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goto out;
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}
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ret = 0;
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out:
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return ret;
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}
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int sve_compare(const void *expect, const void *target, unsigned int vq)
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{
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int i = 0, ret = 0;
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const struct fpsimd_sve_state(vq) * exp = expect;
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const struct fpsimd_sve_state(vq) * tgt = target;
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/* compare low 64 bits of z8-z15 */
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for (i = 8; i <= 15; i++) {
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unsigned long e = (unsigned long)exp->zregs[i][0];
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unsigned long t = (unsigned long)tgt->zregs[i][0];
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if (e != t) {
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printf("Compare Failed, z%2d exp 0x%016lx "
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"val 0x%016lx\n", i, e, t);
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ret = -1;
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}
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}
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return ret;
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}
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int fpsimd_compare(const struct user_fpsimd_state *expect,
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const struct user_fpsimd_state *target, size_t n)
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{
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int i = 0;
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if (memcmp(expect, target, n)) {
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const unsigned long *exp = (const unsigned long *)expect;
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const unsigned long *tgt = (const unsigned long *)target;
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printf("Compare Failed !!\n");
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printf("[show expect values]\n");
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for (i = 0; i < 64; i += 2) {
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printf("q%2d: 0x%016lx 0x%016lx\n",
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i / 2, exp[i], exp[i + 1]);
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}
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printf("fpsr: 0x%08x\n", expect->fpsr);
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printf("fpcr: 0x%08x\n", expect->fpcr);
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printf("[show target values]\n");
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for (i = 0; i < 64; i += 2) {
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printf("q%2d: 0x%016lx 0x%016lx\n",
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i / 2, tgt[i], tgt[i + 1]);
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}
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printf("fpsr: 0x%08x\n", target->fpsr);
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printf("fpcr: 0x%08x\n", target->fpcr);
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return -1;
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}
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return 0;
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}
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void read_fpsimd(struct user_fpsimd_state *regs)
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{
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asm volatile(
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"stp q0, q1, [%0, #16 * 0]\n"
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"stp q2, q3, [%0, #16 * 2]\n"
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"stp q4, q5, [%0, #16 * 4]\n"
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"stp q6, q7, [%0, #16 * 6]\n"
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"stp q8, q9, [%0, #16 * 8]\n"
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"stp q10, q11, [%0, #16 * 10]\n"
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"stp q12, q13, [%0, #16 * 12]\n"
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"stp q14, q15, [%0, #16 * 14]\n"
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"stp q16, q17, [%0, #16 * 16]\n"
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"stp q18, q19, [%0, #16 * 18]\n"
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"stp q20, q21, [%0, #16 * 20]\n"
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"stp q22, q23, [%0, #16 * 22]\n"
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"stp q24, q25, [%0, #16 * 24]\n"
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"stp q26, q27, [%0, #16 * 26]\n"
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"stp q28, q29, [%0, #16 * 28]\n"
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"stp q30, q31, [%0, #16 * 30]\n"
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"mrs x8, fpsr\n"
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"str w8, [%0, #512]\n"
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"mrs x8, fpcr\n"
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"str w8, [%0, #516]\n"
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: : "r" (regs)
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: "x8", "memory"
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);
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}
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