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Fix some race condition on arm64

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* move barrier() to architecture depended region
* add barrier() in issue_ipi, kprintf, map_virtual
* enable the workaround for cavium thunderx
This commit is contained in:
Takayuki Okamoto
2017-09-25 17:47:01 +09:00
committed by Hannes Weisbach
parent 4f2b4aa402
commit 3bd0137c25
8 changed files with 25 additions and 7 deletions
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2
arch/arm64/kernel/include/arch/cpu.h
View File

@@ -25,6 +25,8 @@
#define smp_rmb() dmb(ishld)
#define smp_wmb() dmb(ishst)
#define arch_barrier() smp_mb()
#define smp_store_release(p, v) \
do { \
compiletime_assert_atomic_type(*p); \

2
arch/arm64/kernel/include/assembler.h
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@@ -6,6 +6,8 @@
#if defined(CONFIG_HAS_NMI)
#include <arm-gic-v3.h>
#else /* defined(CONFIG_HAS_NMI) */
#include <sysreg.h>
#endif /* defined(CONFIG_HAS_NMI) */
#if defined(CONFIG_HAS_NMI)

2
arch/arm64/kernel/include/cputype.h
View File

@@ -35,6 +35,8 @@
#define MIDR_IMPLEMENTOR(midr) \
(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
#define ARM_CPU_IMP_CAVIUM 0x43
#ifndef __ASSEMBLY__
static unsigned int read_cpuid_id(void)

15
arch/arm64/kernel/irq-gic-v3.c
View File

@@ -10,6 +10,8 @@
//#define DEBUG_GICV3
#define USE_CAVIUM_THUNDER_X
#ifdef DEBUG_GICV3
#define dkprintf(...) kprintf(__VA_ARGS__)
#define ekprintf(...) kprintf(__VA_ARGS__)
@@ -18,6 +20,10 @@
#define ekprintf(...) kprintf(__VA_ARGS__)
#endif
#ifdef USE_CAVIUM_THUNDER_X
static char is_cavium_thunderx = 0;
#endif
void *dist_base;
void *rdist_base[NR_CPUS];
@@ -108,8 +114,8 @@ static uint64_t gic_read_iar_cavium_thunderx(void)
asm volatile("nop;nop;nop;nop;");
asm volatile("mrs_s %0, " __stringify(ICC_IAR1_EL1) : "=r" (irqstat));
asm volatile("nop;nop;nop;nop;");
mb();
#endif /* CONFIG_HAS_NMI */
mb();
return irqstat;
}
@@ -118,7 +124,7 @@ static uint64_t gic_read_iar_cavium_thunderx(void)
static uint64_t gic_read_iar(void)
{
#ifdef USE_CAVIUM_THUNDER_X
if (static_key_false(&is_cavium_thunderx))
if (is_cavium_thunderx)
return gic_read_iar_cavium_thunderx();
else
#endif
@@ -266,6 +272,7 @@ void arm64_issue_ipi_gicv3(uint32_t cpuid, uint32_t vector)
{
dkprintf("Send irq#%d to cpuid=%d\n", vector, cpuid);
barrier();
if(vector < 16){
// send SGI
arm64_raise_sgi_gicv3(cpuid, vector);
@@ -304,7 +311,9 @@ void gic_dist_init_gicv3(unsigned long dist_base_pa, unsigned long size)
#ifdef USE_CAVIUM_THUNDER_X
/* Cavium ThunderX erratum 23154 */
gicv3_check_capabilities();
if (MIDR_IMPLEMENTOR(read_cpuid_id()) == ARM_CPU_IMP_CAVIUM) {
is_cavium_thunderx = 1;
}
#endif
}