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modify file names and create directories

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This commit is contained in:
Tomoki Shirasawa
2012-12-17 15:39:24 +09:00
parent 9849cf57b1
commit 158903c7b6
61 changed files with 5542 additions and 0 deletions
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84
arch/x86/kernel/include/arch-lock.h Normal file
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/*
* Excerpted from Linux 3.0: arch/x86/include/asm/spinlock.h
*/
#ifndef __HEADER_X86_COMMON_ARCH_LOCK
#define __HEADER_X86_COMMON_ARCH_LOCK
#include <aal/cpu.h>
//#define DEBUG_SPINLOCK
#ifdef DEBUG_SPINLOCK
int __kprintf(const char *format, ...);
#endif
typedef int aal_spinlock_t;
#define AAL_STATIC_SPINLOCK_FUNCS
static void aal_mc_spinlock_init(aal_spinlock_t *lock)
{
*lock = 0;
}
#define SPIN_LOCK_UNLOCKED 0
static unsigned long aal_mc_spinlock_lock(aal_spinlock_t *lock)
{
int inc = 0x00010000;
int tmp;
unsigned long flags;
flags = cpu_disable_interrupt_save();
#if 0
asm volatile("lock ; xaddl %0, %1\n"
"movzwl %w0, %2\n\t"
"shrl $16, %0\n\t"
"1:\t"
"cmpl %0, %2\n\t"
"je 2f\n\t"
"rep ; nop\n\t"
"movzwl %1, %2\n\t"
"jmp 1b\n"
"2:"
: "+Q" (inc), "+m" (*lock), "=r" (tmp) : : "memory", "cc");
#endif
#ifdef DEBUG_SPINLOCK
__kprintf("[%d] trying to grab lock: 0x%lX\n",
aal_mc_get_processor_id(), lock);
#endif
asm volatile("lock; xaddl %0, %1\n"
"movzwl %w0, %2\n\t"
"shrl $16, %0\n\t"
"1:\t"
"cmpl %0, %2\n\t"
"je 2f\n\t"
"rep ; nop\n\t"
"movzwl %1, %2\n\t"
/* don't need lfence here, because loads are in-order */
"jmp 1b\n"
"2:"
: "+r" (inc), "+m" (*lock), "=&r" (tmp)
:
: "memory", "cc");
#ifdef DEBUG_SPINLOCK
__kprintf("[%d] holding lock: 0x%lX\n", aal_mc_get_processor_id(), lock);
#endif
return flags;
}
static void aal_mc_spinlock_unlock(aal_spinlock_t *lock, unsigned long flags)
{
asm volatile ("lock incw %0" : "+m"(*lock) : : "memory", "cc");
cpu_restore_interrupt(flags);
#ifdef DEBUG_SPINLOCK
__kprintf("[%d] released lock: 0x%lX\n", aal_mc_get_processor_id(), lock);
#endif
}
#endif

108
arch/x86/kernel/include/arch-memory.h Normal file
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#ifndef __HEADER_X86_COMMON_ARCH_MEMORY_H
#define __HEADER_X86_COMMON_ARCH_MEMORY_H
#define KERNEL_CS_ENTRY 4
#define KERNEL_DS_ENTRY 5
#define USER_CS_ENTRY 6
#define USER_DS_ENTRY 7
#define GLOBAL_TSS_ENTRY 8
#define KERNEL_CS (KERNEL_CS_ENTRY * 8)
#define KERNEL_DS (KERNEL_DS_ENTRY * 8)
#define USER_CS (USER_CS_ENTRY * 8 + 3)
#define USER_DS (USER_DS_ENTRY * 8 + 3)
#define GLOBAL_TSS (GLOBAL_TSS_ENTRY * 8)
#define PAGE_SHIFT 12
#define PAGE_SIZE (1UL << PAGE_SHIFT)
#define PAGE_MASK (~((unsigned long)PAGE_SIZE - 1))
#define LARGE_PAGE_SHIFT 21
#define LARGE_PAGE_SIZE (1UL << LARGE_PAGE_SHIFT)
#define LARGE_PAGE_MASK (~((unsigned long)LARGE_PAGE_SIZE - 1))
#define USER_END 0x0000800000000000UL
#define MAP_ST_START 0xffff800000000000UL
#define MAP_VMAP_START 0xfffff00000000000UL
#define MAP_FIXED_START 0xffffffff70000000UL
#define MAP_KERNEL_START 0xffffffff80000000UL
#define MAP_VMAP_SIZE 0x0000000100000000UL
#define KERNEL_PHYS_OFFSET MAP_ST_START
#define PTL4_SHIFT 39
#define PTL4_SIZE (1UL << PTL4_SHIFT)
#define PTL3_SHIFT 30
#define PTL3_SIZE (1UL << PTL3_SHIFT)
#define PTL2_SHIFT 21
#define PTL2_SIZE (1UL << PTL2_SHIFT)
#define PTL1_SHIFT 12
#define PTL1_SIZE (1UL << PTL1_SHIFT)
#define PT_ENTRIES 512
#define PFL4_PRESENT 0x01
#define PFL4_WRITABLE 0x02
#define PFL4_USER 0x04
#define PFL3_PRESENT 0x01
#define PFL3_WRITABLE 0x02
#define PFL3_USER 0x04
#define PFL3_ACCESSED 0x20
#define PFL3_DIRTY 0x40
#define PFL3_SIZE 0x80 /* Used in 1G page */
#define PFL3_GLOBAL 0x100
#define PFL2_PRESENT 0x01
#define PFL2_WRITABLE 0x02
#define PFL2_USER 0x04
#define PFL2_ACCESSED 0x20
#define PFL2_DIRTY 0x40
#define PFL2_SIZE 0x80 /* Used in 2M page */
#define PFL2_GLOBAL 0x100
#define PFL2_PWT 0x08
#define PFL2_PCD 0x10
#define PFL1_PRESENT 0x01
#define PFL1_WRITABLE 0x02
#define PFL1_USER 0x04
#define PFL1_ACCESSED 0x20
#define PFL1_DIRTY 0x40
#define PFL1_PWT 0x08
#define PFL1_PCD 0x10
/* We allow user programs to access all the memory */
#define PFL4_KERN_ATTR (PFL4_PRESENT | PFL4_WRITABLE)
#define PFL3_KERN_ATTR (PFL3_PRESENT | PFL3_WRITABLE)
#define PFL2_KERN_ATTR (PFL2_PRESENT | PFL2_WRITABLE)
#define PFL1_KERN_ATTR (PFL1_PRESENT | PFL1_WRITABLE)
/* For easy conversion, it is better to be the same as architecture's ones */
enum aal_mc_pt_attribute {
PTATTR_ACTIVE = 0x01,
PTATTR_WRITABLE = 0x02,
PTATTR_USER = 0x04,
PTATTR_LARGEPAGE = 0x80,
PTATTR_UNCACHABLE = 0x10000,
};
typedef unsigned long pte_t;
struct page_table;
void set_pte(pte_t *ppte, unsigned long phys, int attr);
pte_t *get_pte(struct page_table *pt, void *virt, int attr);
void *early_alloc_page(void);
void *get_last_early_heap(void);
void flush_tlb(void);
void flush_tlb_single(unsigned long addr);
void *map_fixed_area(unsigned long phys, unsigned long size, int uncachable);
#define AP_TRAMPOLINE 0x10000
#define AP_TRAMPOLINE_SIZE 0x4000
/* Local is cachable */
#define AAL_IKC_QUEUE_PT_ATTR (PTATTR_WRITABLE | PTATTR_UNCACHABLE)
#endif

15
arch/x86/kernel/include/bitops.h Normal file
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#ifndef HEADER_X86_COMMON_BITOPS_H
#define HEADER_X86_COMMON_BITOPS_H
static inline int fls(int x)
{
int r;
asm("bsrl %1,%0\n\t"
"jnz 1f\n\t"
"movl $-1,%0\n"
"1:" : "=r" (r) : "rm" (x));
return r + 1;
}
#endif

39
arch/x86/kernel/include/cpulocal.h Normal file
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#ifndef HEADER_X86_COMMON_CPULOCAL_H
#define HEADER_X86_COMMON_CPULOCAL_H
#include <types.h>
#include <registers.h>
/*
* CPU Local Page
* 0 - : struct x86_cpu_local_varibles
* - 4096 : kernel stack
*/
#define X86_CPU_LOCAL_OFFSET_TSS 128
#define X86_CPU_LOCAL_OFFSET_KSTACK 16
#define X86_CPU_LOCAL_OFFSET_USTACK 24
struct x86_cpu_local_variables {
/* 0 */
unsigned long processor_id;
unsigned long apic_id;
/* 16 */
unsigned long kernel_stack;
unsigned long user_stack;
/* 32 */
struct x86_desc_ptr gdt_ptr;
unsigned short pad[3];
/* 48 */
uint64_t gdt[10];
/* 128 */
struct tss64 tss;
} __attribute__((packed));
struct x86_cpu_local_variables *get_x86_cpu_local_variable(int id);
#endif

86
arch/x86/kernel/include/ihk/atomic.h Normal file
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#ifndef HEADER_X86_COMMON_AAL_ATOMIC_H
#define HEADER_X86_COMMON_AAL_ATOMIC_H
typedef struct {
int counter;
} aal_atomic_t;
#define AAL_ATOMIC_INIT(i) { (i) }
static inline int aal_atomic_read(const aal_atomic_t *v)
{
return (*(volatile int *)&(v)->counter);
}
static inline void aal_atomic_set(aal_atomic_t *v, int i)
{
v->counter = i;
}
static inline void aal_atomic_add(int i, aal_atomic_t *v)
{
asm volatile("lock addl %1,%0"
: "+m" (v->counter)
: "ir" (i));
}
static inline void aal_atomic_sub(int i, aal_atomic_t *v)
{
asm volatile("lock subl %1,%0"
: "+m" (v->counter)
: "ir" (i));
}
static inline void aal_atomic_inc(aal_atomic_t *v)
{
asm volatile("lock incl %0"
: "+m" (v->counter));
}
static inline void aal_atomic_dec(aal_atomic_t *v)
{
asm volatile("lock decl %0"
: "+m" (v->counter));
}
static inline int aal_atomic_dec_and_test(aal_atomic_t *v)
{
unsigned char c;
asm volatile("lock decl %0; sete %1"
: "+m" (v->counter), "=qm" (c)
: : "memory");
return c != 0;
}
static inline int aal_atomic_inc_and_test(aal_atomic_t *v)
{
unsigned char c;
asm volatile("lock incl %0; sete %1"
: "+m" (v->counter), "=qm" (c)
: : "memory");
return c != 0;
}
static inline int aal_atomic_add_return(int i, aal_atomic_t *v)
{
int __i;
__i = i;
asm volatile("lock xaddl %0, %1"
: "+r" (i), "+m" (v->counter)
: : "memory");
return i + __i;
}
static inline int aal_atomic_sub_return(int i, aal_atomic_t *v)
{
return aal_atomic_add_return(-i, v);
}
#define aal_atomic_inc_return(v) (aal_atomic_add_return(1, v))
#define aal_atomic_dec_return(v) (aal_atomic_sub_return(1, v))
#endif

27
arch/x86/kernel/include/ihk/context.h Normal file
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#ifndef __HEADER_X86_COMMON_CONTEXT_H
#define __HEADER_X86_COMMON_CONTEXT_H
#include <registers.h>
struct x86_kregs {
unsigned long rsp, rbp, rbx, rsi, rdi, r12, r13, r14, r15, rflags;
unsigned long rsp0;
};
typedef struct x86_kregs aal_mc_kernel_context_t;
/* XXX: User context should contain floating point registers */
typedef struct x86_regs aal_mc_user_context_t;
#define aal_mc_syscall_arg0(uc) (uc)->rdi
#define aal_mc_syscall_arg1(uc) (uc)->rsi
#define aal_mc_syscall_arg2(uc) (uc)->rdx
#define aal_mc_syscall_arg3(uc) (uc)->r10
#define aal_mc_syscall_arg4(uc) (uc)->r8
#define aal_mc_syscall_arg5(uc) (uc)->r9
#define aal_mc_syscall_ret(uc) (uc)->rax
#define aal_mc_syscall_pc(uc) (uc)->rip
#define aal_mc_syscall_sp(uc) (uc)->rsp
#endif

11
arch/x86/kernel/include/ihk/ikc.h Normal file
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#ifndef HEADER_X86_COMMON_AAL_IKC_H
#define HEADER_X86_COMMON_AAL_IKC_H
#include <ikc/aal.h>
/* manycore side */
int aal_mc_ikc_init_first(struct aal_ikc_channel_desc *,
aal_ikc_ph_t handler);
#endif

20
arch/x86/kernel/include/ihk/types.h Normal file
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#ifndef X86_COMMON_TYPES_H
#define X86_COMMON_TYPES_H
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
typedef unsigned long long uint64_t;
typedef char int8_t;
typedef short int16_t;
typedef int int32_t;
typedef long long int64_t;
typedef long long ptrdiff_t;
typedef unsigned long long size_t;
typedef long long ssize_t;
#define NULL ((void *)0)
#endif

148
arch/x86/kernel/include/registers.h Normal file
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#ifndef __HEADER_X86_COMMON_REGISTERS_H
#define __HEADER_X86_COMMON_REGISTERS_H
#include <types.h>
#define RFLAGS_IF (1 << 9)
#define MSR_EFER 0xc0000080
#define MSR_STAR 0xc0000081
#define MSR_LSTAR 0xc0000082
#define MSR_FMASK 0xc0000084
#define MSR_FS_BASE 0xc0000100
#define MSR_GS_BASE 0xc0000101
#define MSR_IA32_APIC_BASE 0x000000001b
#define CVAL(event, mask) \
((((event) & 0xf00) << 24) | ((mask) << 8) | ((event) & 0xff))
#define CVAL2(event, mask, inv, count) \
((((event) & 0xf00) << 24) | ((mask) << 8) | ((event) & 0xff) | \
((inv & 1) << 23) | ((count & 0xff) << 24))
/* AMD */
#define MSR_PERF_CTL_0 0xc0010000
#define MSR_PERF_CTR_0 0xc0010004
static void wrmsr(unsigned int idx, unsigned long value){
unsigned int high, low;
high = value >> 32;
low = value & 0xffffffffU;
asm volatile("wrmsr" : : "c" (idx), "a" (low), "d" (high) : "memory");
}
static unsigned long rdpmc(unsigned int counter)
{
unsigned int high, low;
asm volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (counter));
return (unsigned long)high << 32 | low;
}
static unsigned long rdmsr(unsigned int index)
{
unsigned int high, low;
asm volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (index));
return (unsigned long)high << 32 | low;
}
static unsigned long rdtsc(void)
{
unsigned int high, low;
asm volatile("rdtsc" : "=a" (low), "=d" (high));
return (unsigned long)high << 32 | low;
}
static void set_perfctl(int counter, int event, int mask)
{
unsigned long value;
value = ((unsigned long)(event & 0x700) << 32)
| (event & 0xff) | ((mask & 0xff) << 8) | (1 << 18)
| (1 << 17);
wrmsr(MSR_PERF_CTL_0 + counter, value);
}
static void start_perfctr(int counter)
{
unsigned long value;
value = rdmsr(MSR_PERF_CTL_0 + counter);
value |= (1 << 22);
wrmsr(MSR_PERF_CTL_0 + counter, value);
}
static void stop_perfctr(int counter)
{
unsigned long value;
value = rdmsr(MSR_PERF_CTL_0 + counter);
value &= ~(1 << 22);
wrmsr(MSR_PERF_CTL_0 + counter, value);
}
static void clear_perfctl(int counter)
{
wrmsr(MSR_PERF_CTL_0 + counter, 0);
}
static void set_perfctr(int counter, unsigned long value)
{
wrmsr(MSR_PERF_CTR_0 + counter, value);
}
static unsigned long read_perfctr(int counter)
{
return rdpmc(counter);
}
#define aal_mc_mb() asm volatile("mfence" : : : "memory");
struct x86_desc_ptr {
uint16_t size;
uint64_t address;
} __attribute__((packed));
struct tss64 {
unsigned int reserved0;
unsigned long rsp0;
unsigned long rsp1;
unsigned long rsp2;
unsigned int reserved1, reserved2;
unsigned long ist[7];
unsigned int reserved3, reserved4;
unsigned short reserved5;
unsigned short iomap_address;
} __attribute__((packed));
struct x86_regs {
unsigned long r11, r10, r9, r8;
unsigned long rdi, rsi, rdx, rcx, rbx, rax;
unsigned long error, rip, cs, rflags, rsp, ss;
};
/*
* Page fault error code bits:
*
* bit 0 == 0: no page found 1: protection fault
* bit 1 == 0: read access 1: write access
* bit 2 == 0: kernel-mode access 1: user-mode access
* bit 3 == 1: use of reserved bit detected
* bit 4 == 1: fault was an instruction fetch
*/
enum x86_pf_error_code {
PF_PROT = 1 << 0,
PF_WRITE = 1 << 1,
PF_USER = 1 << 2,
PF_RSVD = 1 << 3,
PF_INSTR = 1 << 4,
};
#endif