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d1edad08e6
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Lab6: fix operator precedence and resolve 64-bit pointer propagation in AArch64 lowering
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2026-06-29 22:29:21 +08:00 |
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6f48016c10
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Lab6: Implement DominatorTree-based natural loop discovery and loop-invariant code motion hoisting pass
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2026-06-01 15:45:10 +08:00 |
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4475e91bd8
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Lab5: Implement register-aliasing-aware peephole optimization pass for redundant stack instruction elimination
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2026-05-18 14:30:22 +08:00 |
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8f7e0ac5b4
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Lab4: Implement basic scalar optimizations and lower Phi nodes to assembly
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2026-05-05 10:20:15 +08:00 |
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0b0bc04be3
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feat: complete Lab3 instruction selection and assembly generation
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2026-04-25 14:30:22 +08:00 |
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979d271ebe
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Complete Lab2 IR generation and document process
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2026-04-16 00:21:35 +08:00 |
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jing
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dfa71bc0d7
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refactor(irgen): 规范采用visitor生成
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2026-03-18 02:07:34 +08:00 |
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jing
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7d4d60c546
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refactor(ir): ir改为更标准的实现
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2026-03-18 01:53:54 +08:00 |
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jing
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f19d23c656
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refactor(irgen): 完善irgen代码和文档，提升扩展兼容性
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2026-03-17 19:14:27 +08:00 |
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Lane0218
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b1155d8fa9
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refactor(dev): 统一 IR/MIR 接口命名风格
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2026-03-12 15:17:02 +08:00 |
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jing
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d0a4c7d6d2
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refactor(dev): 移动头文件位置
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2026-03-12 10:34:02 +08:00 |
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Lane0218
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b939fc40ee
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feat(mir): 增加 Lab3 AArch64 MVP 后端与 --emit-asm 支持
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2026-03-07 22:41:53 +08:00 |
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