From 3ef7bc28d67a6190a14a7bb9b3c0e0a5fabb3f7a Mon Sep 17 00:00:00 2001 From: CGH0S7 <776459475@qq.com> Date: Tue, 30 Jun 2026 00:48:57 +0800 Subject: [PATCH] lower integer add-sub with immediates --- src/mir/Lowering.cpp | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/src/mir/Lowering.cpp b/src/mir/Lowering.cpp index 1b69997..f844d95 100644 --- a/src/mir/Lowering.cpp +++ b/src/mir/Lowering.cpp @@ -368,6 +368,34 @@ void LowerInstruction(const ir::Instruction& inst, MachineFunction& function, int dst_slot = function.CreateFrameIndex(4); slots.emplace(&inst, dst_slot); + if (inst.GetOpcode() == ir::Opcode::Add) { + const ir::Value* variable = nullptr; + int constant = 0; + if (auto* lhs_const = dynamic_cast(bin.GetLhs())) { + variable = bin.GetRhs(); + constant = lhs_const->GetValue(); + } else if (auto* rhs_const = dynamic_cast(bin.GetRhs())) { + variable = bin.GetLhs(); + constant = rhs_const->GetValue(); + } + if (variable && constant >= -4095 && constant <= 4095) { + EmitValueToReg(variable, PhysReg::W8, slots, block); + block.Append(Opcode::AddRegImm, {Operand::Reg(PhysReg::W8), Operand::Reg(PhysReg::W8), Operand::Imm(constant)}); + block.Append(Opcode::StoreStack, {Operand::Reg(PhysReg::W8), Operand::FrameIndex(dst_slot)}); + return; + } + } else if (inst.GetOpcode() == ir::Opcode::Sub) { + if (auto* rhs_const = dynamic_cast(bin.GetRhs())) { + int constant = rhs_const->GetValue(); + if (constant >= -4095 && constant <= 4095) { + EmitValueToReg(bin.GetLhs(), PhysReg::W8, slots, block); + block.Append(Opcode::AddRegImm, {Operand::Reg(PhysReg::W8), Operand::Reg(PhysReg::W8), Operand::Imm(-constant)}); + block.Append(Opcode::StoreStack, {Operand::Reg(PhysReg::W8), Operand::FrameIndex(dst_slot)}); + return; + } + } + } + if (inst.GetOpcode() == ir::Opcode::Mul) { const ir::Value* variable = nullptr; int constant = 0;