CGH0S7
96c5b79a23
Replace Intel compilers (ifx/icpx/icx) with AOCC (flang/clang++/clang), Intel MPI (mpiicpx) with AOCC-built OpenMPI (mpicxx), and Intel MKL with AOCL BLIS/libFLAME. Replace -xHost with -march=znver4, -ipo with -flto, -fp-model fast=2 with -ffast-math, -qopenmp with -fopenmp. Remove PGO, TBB allocator, and Intel-specific runtime libraries. Fix MKL-specific includes in TwoPunctures.C and gaussj.C to use standard CBLAS/LAPACKE headers from AOCL. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
66 lines
2.4 KiB
PHP
Executable File
66 lines
2.4 KiB
PHP
Executable File
## AMD AOCC version with AOCL (Optimized for AMD EPYC Zen 4)
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## AOCL root path for includes and libraries
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AOCL_ROOT ?= /home/aocc/aocl/5.2.0/aocc
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## AOCC-built OpenMPI prefix
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OMPI_PREFIX ?= /home/aocc/aocc-openmpi
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filein = -I/usr/include/ -I$(AOCL_ROOT)/include
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## Using AOCL BLIS + libFLAME for BLAS/LAPACK
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## AOCC Fortran runtime: -lflang (includes FortranRuntime)
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## AOCC OpenMP runtime: -lomp (LLVM OpenMP)
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LDLIBS = -L$(AOCL_ROOT)/lib -lblis -lflame -lamdlibm -lflang -lpgmath -lpthread -lm -ldl -lomp
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## Interp_Points load balance profiling mode
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## off : (default) no load balance instrumentation
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## profile : Pass 1 — instrument Interp_Points to collect timing profile
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## optimize : Pass 2 — read profile and apply block rebalancing
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INTERP_LB_MODE ?= off
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ifeq ($(INTERP_LB_MODE),profile)
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INTERP_LB_FLAGS = -DINTERP_LB_PROFILE
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else ifeq ($(INTERP_LB_MODE),optimize)
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INTERP_LB_FLAGS = -DINTERP_LB_OPTIMIZE
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else
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INTERP_LB_FLAGS =
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endif
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## Kernel implementation switch
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## 1 (default) : use C++ rewrite of bssn_rhs and helper kernels (faster)
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## 0 : fall back to original Fortran kernels
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USE_CXX_KERNELS ?= 1
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## Z4C Cartesian RHS kernel switch
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## 1 (default) : use C++ rewrite of Z4c_rhs (main Cartesian path faster)
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## 0 : use original Fortran Z4c_rhs.o
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USE_CXX_Z4C_KERNELS ?= 1
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## BSSN-EScalar RHS switch
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## 1 (default) : use BSSN-EScalar C wrapper on the normal patch path
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## 0 : keep the original Fortran BSSN-EScalar RHS for precision-safe runs
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## Note: this requires USE_CXX_KERNELS=1 because the wrapper reuses the C BSSN kernel.
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USE_CXX_ESCALAR_KERNEL ?= 1
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## Cached transfer switch
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## auto (default): enable for BSSN vacuum, keep other paths on the safe uncached path
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## 1 : force cached Sync/Restrict/OutBd transfer on evolution hot paths
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## 0 : force the original uncached transfer path
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USE_TRANSFER_CACHE ?= auto
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## RK4 kernel implementation switch
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## 1 (default) : use C/C++ rewrite of rungekutta4_rout (for optimization experiments)
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## 0 : use original Fortran rungekutta4_rout.o
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USE_CXX_RK4 ?= 1
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f90 = flang
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f77 = flang
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CXX = clang++
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CC = clang
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CLINKER = $(OMPI_PREFIX)/bin/mpicxx
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Cu = nvcc
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CUDA_LIB_PATH = -L/usr/lib/cuda/lib64 -I/usr/include -I/usr/lib/cuda/include
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CUDA_APP_FLAGS = -c -g -O3 --ptxas-options=-v -Dfortran3 -Dnewc
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