5 Commits

Author	SHA1	Message	Date
CGH0S7	dcc83bafcb	Support 2nd and 8th order CUDA AMR paths	2026-05-07 20:31:26 +08:00
CGH0S7	c4d8d41b25	Cover Z4C CUDA AMR restrict prolong	2026-05-07 19:49:09 +08:00
CGH0S7	5525465cad	Support CUDA finite-difference order selection	2026-05-07 16:28:02 +08:00
CGH0S7	35b6ceff02	Broaden cached CUDA sync paths	2026-05-01 18:03:04 +08:00
ianchb	c689cc8dc9	[WIP] Add CUDA support for Z4C ... Rewritten done by Codex. This still has errors, do not pick this one now.	2026-04-27 11:58:43 +08:00