diff --git a/AMSS_NCKU_source/bssn_gpu_rhs_ss.cu b/AMSS_NCKU_source/bssn_gpu_rhs_ss.cu
index dac3ba1..d45c89f 100644
--- a/AMSS_NCKU_source/bssn_gpu_rhs_ss.cu
+++ b/AMSS_NCKU_source/bssn_gpu_rhs_ss.cu
@@ -2524,4 +2524,55 @@ int gpu_rhs_ss(RHS_SS_PARA)
 	return 0;//TODO return
 }
 
+#if (ABEtype == 2)
+// Z4C Shell GPU: calls BSSN gpu_rhs_ss with trKd=trK+2*TZ, then applies
+// TZ_rhs = alpn1*Hcon/2 and constraint damping on CPU.
+int gpu_rhs_z4c_ss(Z4C_SS_PARA)
+{
+    int matrix_size = ex[0] * ex[1] * ex[2];
+    double k1 = 0.02, k2 = 0.0;
+
+    double *trKd_host = new double[matrix_size];
+    for (int _i = 0; _i < matrix_size; _i++)
+        trKd_host[_i] = trK[_i] + 2.0 * TZ[_i];
+
+    int result = gpu_rhs_ss(calledby, mpi_rank,
+        ex, T, crho, sigma, R, X, Y, Z,
+        drhodx, drhody, drhodz, dsigmadx, dsigmady, dsigmadz,
+        dRdx, dRdy, dRdz,
+        drhodxx, drhodxy, drhodxz, drhodyy, drhodyz, drhodzz,
+        dsigmadxx, dsigmadxy, dsigmadxz, dsigmadyy, dsigmadyz, dsigmadzz,
+        dRdxx, dRdxy, dRdxz, dRdyy, dRdyz, dRdzz,
+        chi, trKd_host, dxx, gxy, gxz, dyy, gyz, dzz,
+        Axx, Axy, Axz, Ayy, Ayz, Azz,
+        Gamx, Gamy, Gamz,
+        Lap, betax, betay, betaz,
+        dtSfx, dtSfy, dtSfz,
+        chi_rhs, trK_rhs,
+        gxx_rhs, gxy_rhs, gxz_rhs, gyy_rhs, gyz_rhs, gzz_rhs,
+        Axx_rhs, Axy_rhs, Axz_rhs, Ayy_rhs, Ayz_rhs, Azz_rhs,
+        Gamx_rhs, Gamy_rhs, Gamz_rhs,
+        Lap_rhs, betax_rhs, betay_rhs, betaz_rhs,
+        dtSfx_rhs, dtSfy_rhs, dtSfz_rhs,
+        rho, Sx, Sy, Sz, Sxx, Sxy, Sxz, Syy, Syz, Szz,
+        Gamxxx, Gamxxy, Gamxxz, Gamxyy, Gamxyz, Gamxzz,
+        Gamyxx, Gamyxy, Gamyxz, Gamyyy, Gamyyz, Gamyzz,
+        Gamzxx, Gamzxy, Gamzxz, Gamzyy, Gamzyz, Gamzzz,
+        Rxx, Rxy, Rxz, Ryy, Ryz, Rzz,
+        ham_Res, movx_Res, movy_Res, movz_Res,
+        Gmx_Res, Gmy_Res, Gmz_Res,
+        Symmetry, Lev, eps, sst, co);
+    delete[] trKd_host;
+    if (result != 0) return result;
+
+    for (int _i = 0; _i < matrix_size; _i++) {
+        double alp = Lap[_i] + 1.0;
+        TZ_rhs[_i] = alp * ham_Res[_i] * 0.5;
+        TZ_rhs[_i]  -= alp * (2.0 + k2) * k1 * TZ[_i];
+        trK_rhs[_i] += alp * k1 * (1.0 - k2) * TZ[_i];
+    }
+    return 0;
+}
+#endif // ABEtype == 2
+
 #endif //WithShell
diff --git a/AMSS_NCKU_source/makefile b/AMSS_NCKU_source/makefile
index d777710..b3f6914 100644
--- a/AMSS_NCKU_source/makefile
+++ b/AMSS_NCKU_source/makefile
@@ -74,10 +74,6 @@ bssn_rhs_cuda.o: bssn_rhs_cuda.cu bssn_rhs.h macrodef.h fd_cuda_helpers.cuh
 bssn_gpu_rhs_ss.o: bssn_gpu_rhs_ss.cu bssn_gpu.h gpu_rhsSS_mem.h bssn_macro.h macrodef.fh
 	$(Cu) $(CUDA_APP_FLAGS) -c $< -o $@ $(CUDA_LIB_PATH)
 
-# CUDA rewrite of Z4C Shell-Patch RHS (extends BSSN shells with TZ + constraint damping)
-z4c_gpu_rhs_ss.o: z4c_gpu_rhs_ss.cu bssn_gpu.h gpu_rhsSS_mem.h bssn_macro.h macrodef.fh
-	$(Cu) $(CUDA_APP_FLAGS) -c $< -o $@ $(CUDA_LIB_PATH)
-
 # CUDA rewrite of Z4C Cartesian RHS
 z4c_rhs_cuda.o: z4c_rhs_cuda.cu z4c_rhs_cuda.h bssn_rhs.h macrodef.h ricci_gamma.h fd_cuda_helpers.cuh
 	$(Cu) $(CUDA_APP_FLAGS) -c $< -o $@ $(CUDA_LIB_PATH)
@@ -163,7 +159,7 @@ RK4_F90_OBJ = rungekutta4_rout.o
 endif
 
 CFILES += $(RK4_C_OBJ)
-ABE_CUDA_CFILES = $(CFILES_CUDA_BSSN) z4c_rhs_cuda.o z4c_gpu_rhs_ss.o $(RK4_C_OBJ)
+ABE_CUDA_CFILES = $(CFILES_CUDA_BSSN) z4c_rhs_cuda.o $(RK4_C_OBJ)
 
 ABE_LDLIBS = $(LDLIBS)
 ifeq ($(USE_CUDA_BSSN),1)