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Complete BSSN-EScalar CUDA resident transfers

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This commit is contained in:
CGH0S7
2026-05-05 23:57:42 +08:00
parent 85fe29cc2e
commit ae64a22178
5 changed files with 995 additions and 72 deletions
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79
AMSS_NCKU_source/bssn_class.C
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@@ -102,7 +102,15 @@ bool amss_cached_rp_restrict_enabled()
{
static int enabled = -1;
if (enabled < 0)
enabled = amss_env_flag_enabled("AMSS_RP_CACHED_RESTRICT") ? 1 : 0;
{
#if (ABEtype == 1)
enabled = 1;
#else
enabled = 0;
#endif
if (amss_env_flag_enabled("AMSS_RP_CACHED_RESTRICT"))
enabled = 1;
}
return enabled != 0;
}
@@ -110,7 +118,15 @@ bool amss_cached_rp_outbd_enabled()
{
static int enabled = -1;
if (enabled < 0)
enabled = amss_env_flag_enabled("AMSS_RP_CACHED_OUTBD") ? 1 : 0;
{
#if (ABEtype == 1)
enabled = 1;
#else
enabled = 0;
#endif
if (amss_env_flag_enabled("AMSS_RP_CACHED_OUTBD"))
enabled = 1;
}
return enabled != 0;
}
@@ -118,7 +134,15 @@ bool amss_cached_rp_fine_sync_enabled()
{
static int enabled = -1;
if (enabled < 0)
enabled = amss_env_flag_enabled("AMSS_RP_CACHED_FINE_SYNC") ? 1 : 0;
{
#if (ABEtype == 1)
enabled = 1;
#else
enabled = 0;
#endif
if (amss_env_flag_enabled("AMSS_RP_CACHED_FINE_SYNC"))
enabled = 1;
}
return enabled != 0;
}
@@ -819,6 +843,17 @@ bool bssn_cuda_regrid_flush_enabled()
return enabled != 0;
}
bool bssn_cuda_regrid_flush_always_enabled()
{
static int enabled = -1;
if (enabled < 0)
{
const char *env = getenv("AMSS_CUDA_REGRID_FLUSH_ALWAYS");
enabled = (env && atoi(env) != 0) ? 1 : 0;
}
return enabled != 0;
}
bool bssn_cuda_will_regrid_onelevel(cgh *GH, int lev, int Symmetry, int BH_num, double **Porg0)
{
if (!GH || lev < GH->movls || lev >= GH->levels || !GH->PatL[lev])
@@ -882,8 +917,11 @@ bool bssn_cuda_will_regrid_onelevel(cgh *GH, int lev, int Symmetry, int BH_num,
bool bssn_cuda_should_flush_before_regrid(cgh *GH, int lev, int Symmetry, int BH_num, double **Porg0)
{
return bssn_cuda_regrid_flush_enabled() &&
bssn_cuda_will_regrid_onelevel(GH, lev, Symmetry, BH_num, Porg0);
if (!bssn_cuda_regrid_flush_enabled())
return false;
if (bssn_cuda_regrid_flush_always_enabled())
return GH && lev >= GH->movls && lev < GH->levels && GH->PatL[lev];
return bssn_cuda_will_regrid_onelevel(GH, lev, Symmetry, BH_num, Porg0);
}
void bssn_cuda_sync_level_bh_fields(MyList<Patch> *PatL,
@@ -925,6 +963,27 @@ bool bssn_constraint_recompute_from_state(int lev, bool level0_cache_valid)
} // namespace
#endif
#if USE_CUDA_BSSN
bool bssn_cuda_bh_interp_resident_enabled()
{
static int enabled = -1;
if (enabled < 0)
{
const char *env = getenv("AMSS_CUDA_BH_INTERP_RESIDENT");
if (env)
enabled = (atoi(env) != 0) ? 1 : 0;
#if (ABEtype == 1)
else
enabled = 1;
#else
else
enabled = 1;
#endif
}
return enabled != 0;
}
#endif
//================================================================================================
// define bssn_class
@@ -3895,10 +3954,11 @@ void bssn_class::ParallelStep()
// a_stream<<lev<<": after calling GH->Regrid_Onelevel_aux for lower level";
// misc::tillherecheck(GH->Commlev[lev],GH->start_rank[lev],a_stream.str());
}
}
}
#endif
}
}
#endif
}
#ifdef WithShell
SHStep();
@@ -8392,7 +8452,8 @@ void bssn_class::compute_Porg_rhs(double **BH_PS, double **BH_RHS, var *forx, va
int lev = ilev;
#if USE_CUDA_BSSN
if (bssn_cuda_use_resident_sync(lev) &&
if (bssn_cuda_bh_interp_resident_enabled() &&
bssn_cuda_use_resident_sync(lev) &&
bssn_cuda_interp_bh_point_resident(GH->PatL[lev], myrank, BH_PS[n], forx, fory, forz, Symmetry, shellf))
{
BH_RHS[n][0] = -shellf[0];